summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/Stop.scala
diff options
context:
space:
mode:
authorJack2022-01-12 04:27:19 +0000
committerJack2022-01-12 04:27:19 +0000
commit29df513e348cc809876893f650af8180f0190496 (patch)
tree06daaea954b4e5af7113f06e4bdbb78b33515cb3 /src/test/scala/chiselTests/Stop.scala
parent5242ce90659decb9058ee75db56e5c188029fbf9 (diff)
parent747d16311bdf185d2e98e452b14cb5d8ccca004c (diff)
Merge branch 'master' into 3.5-release
Diffstat (limited to 'src/test/scala/chiselTests/Stop.scala')
-rw-r--r--src/test/scala/chiselTests/Stop.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/Stop.scala b/src/test/scala/chiselTests/Stop.scala
index 1634f776..25aae2d9 100644
--- a/src/test/scala/chiselTests/Stop.scala
+++ b/src/test/scala/chiselTests/Stop.scala
@@ -12,7 +12,7 @@ class StopTester() extends BasicTester {
class StopImmediatelyTester extends BasicTester {
val cycle = RegInit(0.asUInt(4.W))
cycle := cycle + 1.U
- when (cycle === 4.U) {
+ when(cycle === 4.U) {
stop()
}
assert(cycle =/= 5.U, "Simulation did not exit upon executing stop()")