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authorJiuyang Liu2021-05-09 13:32:48 +0000
committerGitHub2021-05-09 13:32:48 +0000
commitc118facb82e43c010a6333c5281b956a7c9c7e20 (patch)
tree96ae73b285c2fee4ce9f5d5305fa798374dbeeb6 /src/test/scala/chiselTests/Reg.scala
parent1f798a3a196b190cc5e100734f1f5479729431ac (diff)
Fix ShiftRegister with 0 delay. (#1903)
* Add test to check ShiftRegister(s) with delay is 0. This should break ShiftRegister(x, 0) since last is not exist in a empty Seq. Originally, test only test 1 to 4, which missed a potential bug from #1723. * Fix ShiftRegister with 0 delay. if ShiftRegisters is empty, java will complain: ``` java.util.NoSuchElementException scala.collection.LinearSeqOptimized.last(LinearSeqOptimized.scala:150) ``` This fix this issue and return `in` directly when ShiftRegister size is 0. Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Diffstat (limited to 'src/test/scala/chiselTests/Reg.scala')
-rw-r--r--src/test/scala/chiselTests/Reg.scala9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/test/scala/chiselTests/Reg.scala b/src/test/scala/chiselTests/Reg.scala
index 21334aea..a02e6fa5 100644
--- a/src/test/scala/chiselTests/Reg.scala
+++ b/src/test/scala/chiselTests/Reg.scala
@@ -7,6 +7,7 @@ import chisel3.util._
import chisel3.experimental.DataMirror
import chisel3.stage.ChiselStage
import chisel3.testers.BasicTester
+import org.scalacheck.Gen
class RegSpec extends ChiselFlatSpec {
"Reg" should "be of the same type and width as t" in {
@@ -55,18 +56,18 @@ class ShiftResetTester(n: Int) extends BasicTester {
val start = 23.U
val sr = ShiftRegister(cntVal + 23.U, n, 1.U, true.B)
when(done) {
- assert(sr === 1.U)
+ assert(sr === (if(n == 0) cntVal + 23.U else 1.U))
stop()
}
}
class ShiftRegisterSpec extends ChiselPropSpec {
property("ShiftRegister should shift") {
- forAll(smallPosInts) { (shift: Int) => assertTesterPasses{ new ShiftTester(shift) } }
+ forAll(Gen.choose(0, 4)) { (shift: Int) => assertTesterPasses{ new ShiftTester(shift) } }
}
property("ShiftRegister should reset all values inside") {
- forAll(smallPosInts) { (shift: Int) => assertTesterPasses{ new ShiftResetTester(shift) } }
+ forAll(Gen.choose(0, 4)) { (shift: Int) => assertTesterPasses{ new ShiftResetTester(shift) } }
}
}
@@ -84,6 +85,6 @@ class ShiftsTester(n: Int) extends BasicTester {
class ShiftRegistersSpec extends ChiselPropSpec {
property("ShiftRegisters should shift") {
- forAll(smallPosInts) { (shift: Int) => assertTesterPasses{ new ShiftsTester(shift) } }
+ forAll(Gen.choose(0, 4)) { (shift: Int) => assertTesterPasses{ new ShiftsTester(shift) } }
}
}