diff options
| author | Jack Koenig | 2022-01-10 10:39:52 -0800 |
|---|---|---|
| committer | Jack Koenig | 2022-01-10 15:53:55 -0800 |
| commit | 3131c0daad41dea78bede4517669e376c41a325a (patch) | |
| tree | 55baed78a6a01f80ff3952a08233ca553a19964f /src/test/scala/chiselTests/RebindingSpec.scala | |
| parent | dd36f97a82746cec0b25b94651581fe799e24579 (diff) | |
Apply scalafmt
Command:
sbt scalafmtAll
Diffstat (limited to 'src/test/scala/chiselTests/RebindingSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/RebindingSpec.scala | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/src/test/scala/chiselTests/RebindingSpec.scala b/src/test/scala/chiselTests/RebindingSpec.scala index 808b1137..5dc0589e 100644 --- a/src/test/scala/chiselTests/RebindingSpec.scala +++ b/src/test/scala/chiselTests/RebindingSpec.scala @@ -7,22 +7,26 @@ import chisel3.stage.ChiselStage class RebindingSpec extends ChiselFlatSpec with Utils { "Rebinding a literal" should "fail" in { - a [BindingException] should be thrownBy extractCause[BindingException] { - ChiselStage.elaborate { new Module { - val io = IO(new Bundle { - val a = 4.U - }) - } } + a[BindingException] should be thrownBy extractCause[BindingException] { + ChiselStage.elaborate { + new Module { + val io = IO(new Bundle { + val a = 4.U + }) + } + } } } "Rebinding a hardware type" should "fail" in { - a [BindingException] should be thrownBy extractCause[BindingException] { - ChiselStage.elaborate { new Module { - val io = IO(new Bundle { - val a = Reg(UInt(32.W)) - }) - } } + a[BindingException] should be thrownBy extractCause[BindingException] { + ChiselStage.elaborate { + new Module { + val io = IO(new Bundle { + val a = Reg(UInt(32.W)) + }) + } + } } } } |
