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| author | Andrew Waterman | 2016-10-05 15:32:23 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2016-10-05 16:05:20 -0700 |
| commit | 7981c6d9e6d25fb27b25e1427794775c9f934a09 (patch) | |
| tree | cae7aed020df89f3923044475c2ad6b4cb9ed4c6 /src/test/scala/chiselTests/ModuleExplicitResetSpec.scala | |
| parent | 0878b7a7d30038797e3711ad2d44ab0bc753bab1 (diff) | |
Use modulo addressing for dynamic Vec/Mem accesses
Static accesses are strictly checked.
Diffstat (limited to 'src/test/scala/chiselTests/ModuleExplicitResetSpec.scala')
0 files changed, 0 insertions, 0 deletions