Merge branch 'master' into add-asbool-to-clock

1 files changed, 16 insertions, 1 deletions

diff --git a/src/test/scala/chiselTests/IntervalSpec.scala b/src/test/scala/chiselTests/IntervalSpec.scala
index 1e56d8a3..ee704c83 100644
--- a/src/test/scala/chiselTests/IntervalSpec.scala
+++ b/src/test/scala/chiselTests/IntervalSpec.scala
@@ -456,12 +456,27 @@ class IntervalSpec extends FreeSpec with Matchers with ChiselRunners {
           () =>
             new BasicTester {
               val x = 5.I(range"[0,4]")
-            }
+          }
         ).elaborate
       }
     }
   }
 
+  "Interval literals support to double and to BigDecimal" in {
+    val d = -7.125
+    val lit1 = d.I(3.BP)
+    lit1.litToDouble should be (d)
+
+    val d2 = BigDecimal("1232123213131123.125")
+    val lit2 = d2.I(3.BP)
+    lit2.litToBigDecimal should be (d2)
+
+    // Numbers that are too big will throw exception
+    intercept[ChiselException] {
+      lit2.litToDouble
+    }
+  }
+
   "Interval literals creation handles edge cases" - {
     "value at closed boundaries works" in {
       val inputRange = range"[-6, 6].2"