diff options
| author | Jack Koenig | 2022-01-10 16:32:51 -0800 |
|---|---|---|
| committer | GitHub | 2022-01-10 16:32:51 -0800 |
| commit | 2b48fd15a7711dcd44334fbbc538667a102a581a (patch) | |
| tree | 4b4766347c3943d65c13e5de2d139b14821eec61 /src/test/scala/chiselTests/InlineSpec.scala | |
| parent | 92e77a97af986629766ac9038f0ebc8ab9a48fa1 (diff) | |
| parent | bff8dc0738adafa1176f6959a33ad86f6373c558 (diff) | |
Merge pull request #2246 from chipsalliance/scalafmt
Add scalafmt configuration and apply it.
Diffstat (limited to 'src/test/scala/chiselTests/InlineSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/InlineSpec.scala | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/src/test/scala/chiselTests/InlineSpec.scala b/src/test/scala/chiselTests/InlineSpec.scala index 59a1e984..09a92e45 100644 --- a/src/test/scala/chiselTests/InlineSpec.scala +++ b/src/test/scala/chiselTests/InlineSpec.scala @@ -4,7 +4,7 @@ package chiselTests import chisel3._ import chisel3.stage.{ChiselGeneratorAnnotation, ChiselStage} -import chisel3.util.experimental.{InlineInstance, FlattenInstance} +import chisel3.util.experimental.{FlattenInstance, InlineInstance} import firrtl.passes.InlineAnnotation import firrtl.stage.{FirrtlCircuitAnnotation, FirrtlStage} import firrtl.transforms.FlattenAnnotation @@ -16,7 +16,7 @@ import org.scalatest.matchers.should.Matchers class InlineSpec extends AnyFreeSpec with ChiselRunners with Matchers { trait Internals { this: Module => - val io = IO(new Bundle{ val a = Input(Bool()) }) + val io = IO(new Bundle { val a = Input(Bool()) }) } class Sub extends Module with Internals trait HasSub { this: Module with Internals => @@ -29,9 +29,9 @@ class InlineSpec extends AnyFreeSpec with ChiselRunners with Matchers { class Baz extends Module with Internals with HasSub class Qux extends Module with Internals with HasSub - def collectInstances(c: fir.Circuit, top: Option[String] = None): Seq[String] = new InstanceGraph(c) - .fullHierarchy.values.flatten.toSeq - .map( v => (top.getOrElse(v.head.name) +: v.tail.map(_.name)).mkString(".") ) + def collectInstances(c: fir.Circuit, top: Option[String] = None): Seq[String] = + new InstanceGraph(c).fullHierarchy.values.flatten.toSeq + .map(v => (top.getOrElse(v.head.name) +: v.tail.map(_.name)).mkString(".")) val chiselStage = new ChiselStage val firrtlStage = new FirrtlStage @@ -46,17 +46,20 @@ class InlineSpec extends AnyFreeSpec with ChiselRunners with Matchers { "should compile to low FIRRTL" - { val chiselAnnotations = chiselStage - .execute(Array("--no-run-firrtl", "--target-dir", "test_run_dir"), - Seq(ChiselGeneratorAnnotation(() => new Top))) + .execute( + Array("--no-run-firrtl", "--target-dir", "test_run_dir"), + Seq(ChiselGeneratorAnnotation(() => new Top)) + ) - chiselAnnotations.collect{ case a: InlineAnnotation => a } should have length (2) + (chiselAnnotations.collect { case a: InlineAnnotation => a } should have).length(2) val instanceNames = firrtlStage .execute(Array("-X", "low"), chiselAnnotations) .collectFirst { case FirrtlCircuitAnnotation(circuit) => circuit - }.map(collectInstances(_, Some("Top"))) + } + .map(collectInstances(_, Some("Top"))) .getOrElse(fail) instanceNames should contain theSameElementsAs Set("Top", "Top.x_sub", "Top.y_sub", "Top.z", "Top.z.sub") @@ -71,17 +74,20 @@ class InlineSpec extends AnyFreeSpec with ChiselRunners with Matchers { "should compile to low FIRRTL" - { val chiselAnnotations = chiselStage - .execute(Array("--no-run-firrtl", "--target-dir", "test_run_dir"), - Seq(ChiselGeneratorAnnotation(() => new Top))) + .execute( + Array("--no-run-firrtl", "--target-dir", "test_run_dir"), + Seq(ChiselGeneratorAnnotation(() => new Top)) + ) - chiselAnnotations.collect{ case a: FlattenAnnotation => a} should have length(1) + (chiselAnnotations.collect { case a: FlattenAnnotation => a } should have).length(1) val instanceNames = firrtlStage .execute(Array("-X", "low"), chiselAnnotations) .collectFirst { case FirrtlCircuitAnnotation(circuit) => circuit - }.map(collectInstances(_, Some("Top"))) + } + .map(collectInstances(_, Some("Top"))) .getOrElse(fail) instanceNames should contain theSameElementsAs Set("Top", "Top.x") |
