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authorJack Koenig2017-12-19 18:20:06 -0800
committerGitHub2017-12-19 18:20:06 -0800
commit0f5ba51572b22ff5c85f9dd1add82680e0620797 (patch)
tree1db1e5209abe11151e606bbe1049f677d20f1e58 /src/test/scala/chiselTests/ConnectSpec.scala
parentd95cb262aefc06458652b227980a3cdc5471d3ba (diff)
Properly invalidate submodule IOs in tests (#745)
Diffstat (limited to 'src/test/scala/chiselTests/ConnectSpec.scala')
-rw-r--r--src/test/scala/chiselTests/ConnectSpec.scala1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/ConnectSpec.scala b/src/test/scala/chiselTests/ConnectSpec.scala
index fb0675c4..ac6508ef 100644
--- a/src/test/scala/chiselTests/ConnectSpec.scala
+++ b/src/test/scala/chiselTests/ConnectSpec.scala
@@ -32,6 +32,7 @@ class PipeInternalWires extends Module {
class CrossConnectTester(inType: Data, outType: Data) extends BasicTester {
val dut = Module(new CrossConnects(inType, outType))
+ dut.io := DontCare
stop()
}