summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/ComplexAssign.scala
diff options
context:
space:
mode:
authorAdam Izraelevitz2017-10-26 12:39:42 -0700
committerJim Lawson2017-10-26 12:39:42 -0700
commitc313e137d4e562ef20195312501840ceab8cbc6a (patch)
tree37e290d3c5af672624b9ac267ccb33421acca84e /src/test/scala/chiselTests/ComplexAssign.scala
parent8168a8eea6c3465966081c5acd0347e09791361c (diff)
Invalidateapi (#645)
* Require explicit connection to DontCare to generate "is invalid". * Add tests for RefNotInitializedException. Currently, we fail the when ... otherwise ... * Disable ScalaTest shrinking on error in ComplexAssignSpec. * fix broken merge; still some binding issues * cleanup DontCare connection checks; add missing directions to test module IOs * Have library code inherit compileOptions from the enclosing Module (if it exists). * work around current firrtl uninitialized references with Strict compile options and explicitInvalidate * more CompileOptions cleanup; move test-specific defines to package object * minimize differences with master * set default CompileOptions.explicitInvalidate to false until we fix the FIRRTL when issue * ignore the StrictCompiler property checks (until CompileOptions.explicitInvalidate is defaulted to true) * Revert "more CompileOptions cleanup; move test-specific defines to package object" This reverts commit e4486edcba990d150e76e08a2fc6abca033556e0. * Revert "work around current firrtl uninitialized references with Strict compile options and explicitInvalidate" This reverts commit 426faa430a62c3dac2dbdf33044d3386d4243157. * remove unused code * Convert to binding-based DontCare implementation * comment cleanup to minimize differences with master * Tentatively remove possibly redundant DefInvalid on module ports. * Respond to code review change request. - backout build.sbt change - correct indentation - handle bulk of DontCare semantics in elemConnect() - have DontCare extend Element, not Data (eliminate most Object specific methods - add comments indicating reason for explicit DontCare connections * Initialize test elements without requiring a DontCare. * Respond to review change requests. - DontCare should work on left or right side in BiDirectional connections - call bind() to set DontCare binding instead of messing with internal variables - DontCares are only equivalent with DontCares - clean up processWhens() definition * Eliminate DontCare connection to inputs in MonoConnect(). * Pull aggregates apart for the purpose of DontCare connections. * Restore the explicit (conditionally executed) ports DefInvalidin ImplicitModule() * Don't add DontCare's to the module list of _ids. * Add missing DefInvalid() to LegacyModule(). * Respond to review requests: add DontCare BiConnect Vec, remove null parent hack to avoid addId(), initialize singletons early in Builder * Move DontCare out of chisel3.experimental.
Diffstat (limited to 'src/test/scala/chiselTests/ComplexAssign.scala')
-rw-r--r--src/test/scala/chiselTests/ComplexAssign.scala4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala
index a13ec959..e101e7c0 100644
--- a/src/test/scala/chiselTests/ComplexAssign.scala
+++ b/src/test/scala/chiselTests/ComplexAssign.scala
@@ -8,6 +8,7 @@ import org.scalatest.prop._
import chisel3._
import chisel3.testers.BasicTester
import chisel3.util._
+import org.scalacheck.Shrink
class Complex[T <: Data](val re: T, val im: T) extends Bundle {
override def cloneType: this.type =
@@ -47,6 +48,9 @@ class ComplexAssignTester(enList: List[Boolean], re: Int, im: Int) extends Basic
class ComplexAssignSpec extends ChiselPropSpec {
property("All complex assignments should return the correct result") {
+ // Disable shrinking on error.
+ implicit val noShrinkListVal = Shrink[List[Boolean]](_ => Stream.empty)
+ implicit val noShrinkInt = Shrink[Int](_ => Stream.empty)
forAll(enSequence(2), safeUInts, safeUInts) { (en: List[Boolean], re: Int, im: Int) =>
assertTesterPasses{ new ComplexAssignTester(en, re, im) }
}