Merge pull request #2246 from chipsalliance/scalafmt

Add scalafmt configuration and apply it.

1 files changed, 5 insertions, 5 deletions

diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala
index 222b6373..99313967 100644
--- a/src/test/scala/chiselTests/ComplexAssign.scala
+++ b/src/test/scala/chiselTests/ComplexAssign.scala
@@ -11,16 +11,16 @@ class Complex[T <: Data](val re: T, val im: T) extends Bundle
 
 class ComplexAssign(w: Int) extends Module {
   val io = IO(new Bundle {
-    val e   = Input(Bool())
-    val in  = Input(new Complex(UInt(w.W), UInt(w.W)))
+    val e = Input(Bool())
+    val in = Input(new Complex(UInt(w.W), UInt(w.W)))
     val out = Output(new Complex(UInt(w.W), UInt(w.W)))
   })
-  when (io.e) {
+  when(io.e) {
     val tmp = Wire(new Complex(UInt(w.W), UInt(w.W)))
     tmp := io.in
     io.out.re := tmp.re
     io.out.im := tmp.im
-  } .otherwise {
+  }.otherwise {
     io.out.re := 0.U
     io.out.im := 0.U
   }
@@ -46,7 +46,7 @@ class ComplexAssignSpec extends ChiselPropSpec {
     implicit val noShrinkListVal = Shrink[List[Boolean]](_ => Stream.empty)
     implicit val noShrinkInt = Shrink[Int](_ => Stream.empty)
     forAll(enSequence(2), safeUInts, safeUInts) { (en: List[Boolean], re: Int, im: Int) =>
-      assertTesterPasses{ new ComplexAssignTester(en, re, im) }
+      assertTesterPasses { new ComplexAssignTester(en, re, im) }
     }
   }
 }