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authorJack Koenig2022-01-10 10:39:52 -0800
committerJack Koenig2022-01-10 15:53:55 -0800
commit3131c0daad41dea78bede4517669e376c41a325a (patch)
tree55baed78a6a01f80ff3952a08233ca553a19964f /src/test/scala/chiselTests/CompileOptionsTest.scala
parentdd36f97a82746cec0b25b94651581fe799e24579 (diff)
Apply scalafmt
Command: sbt scalafmtAll
Diffstat (limited to 'src/test/scala/chiselTests/CompileOptionsTest.scala')
-rw-r--r--src/test/scala/chiselTests/CompileOptionsTest.scala10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/test/scala/chiselTests/CompileOptionsTest.scala b/src/test/scala/chiselTests/CompileOptionsTest.scala
index 1ecf97f0..3ec59954 100644
--- a/src/test/scala/chiselTests/CompileOptionsTest.scala
+++ b/src/test/scala/chiselTests/CompileOptionsTest.scala
@@ -20,7 +20,7 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
}
"A Module with missing bundle fields when compiled with implicit Strict.CompileOption " should "throw an exception" in {
- a [ChiselException] should be thrownBy extractCause[ChiselException] {
+ a[ChiselException] should be thrownBy extractCause[ChiselException] {
import chisel3.ExplicitCompileOptions.Strict
class ConnectFieldMismatchModule extends Module {
@@ -48,7 +48,7 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
}
"A Module in which a Reg is created with a bound type when compiled with implicit Strict.CompileOption " should "throw an exception" in {
- a [BindingException] should be thrownBy extractCause[BindingException] {
+ a[BindingException] should be thrownBy extractCause[BindingException] {
import chisel3.ExplicitCompileOptions.Strict
class CreateRegFromBoundTypeModule extends Module {
@@ -89,7 +89,7 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
}
"A Module with unwrapped IO when compiled with implicit Strict.CompileOption " should "throw an exception" in {
- a [BindingException] should be thrownBy extractCause[BindingException] {
+ a[BindingException] should be thrownBy extractCause[BindingException] {
import chisel3.ExplicitCompileOptions.Strict
class RequireIOWrapModule extends Module {
@@ -106,7 +106,7 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
}
"A Module connecting output as source to input as sink when compiled with implicit Strict.CompileOption " should "throw an exception" in {
- a [ChiselException] should be thrownBy extractCause[ChiselException] {
+ a[ChiselException] should be thrownBy extractCause[ChiselException] {
import chisel3.ExplicitCompileOptions.Strict
class SimpleModule extends Module {
@@ -140,7 +140,7 @@ class CompileOptionsSpec extends ChiselFlatSpec with Utils {
}
"A Module with directionless connections when compiled with implicit Strict.CompileOption " should "throw an exception" in {
- a [ChiselException] should be thrownBy extractCause[ChiselException] {
+ a[ChiselException] should be thrownBy extractCause[ChiselException] {
// Verify we can suppress the inclusion of default compileOptions
import Chisel.{defaultCompileOptions => _}
import chisel3.ExplicitCompileOptions.Strict