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| author | ducky | 2016-11-17 13:01:03 -0800 |
|---|---|---|
| committer | ducky | 2016-11-21 13:31:12 -0800 |
| commit | 54d3f8dc054e55dfbd01d1aa034169a3dabe89f2 (patch) | |
| tree | 7f6f9de04de6eb08878ac46be339fefc2a71395f /src/test/scala/chiselTests/Clock.scala | |
| parent | cd904da0aa0e96ba679906a3ee5dbdc068eace48 (diff) | |
Restyle a lot of test code, mainly with regex
Diffstat (limited to 'src/test/scala/chiselTests/Clock.scala')
| -rw-r--r-- | src/test/scala/chiselTests/Clock.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/Clock.scala b/src/test/scala/chiselTests/Clock.scala index 79dd2de4..78d60ed2 100644 --- a/src/test/scala/chiselTests/Clock.scala +++ b/src/test/scala/chiselTests/Clock.scala @@ -10,7 +10,7 @@ import chisel3.testers.BasicTester import chisel3.util._ class ClockAsUIntTester extends BasicTester { - assert(Bool(true).asClock.asUInt === UInt(1)) + assert(true.B.asClock.asUInt === 1.U) stop() } |