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authorducky2015-12-10 16:22:59 -0800
committerducky2016-01-30 14:45:55 -0800
commit898efea92e9e13775b39dd7fb92cac420334b9c9 (patch)
treebb7cdb52fbfe90c44de5846f5175b27d894e3b27 /src/test/scala/chiselTests/BundleWire.scala
parent8d8c407c0c1693160d6f0972165e376e09aa99c9 (diff)
Add BlackBox support and test, refactor execute => assertTesterPasses
Diffstat (limited to 'src/test/scala/chiselTests/BundleWire.scala')
-rw-r--r--src/test/scala/chiselTests/BundleWire.scala2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala
index 128b2c5f..bef56a56 100644
--- a/src/test/scala/chiselTests/BundleWire.scala
+++ b/src/test/scala/chiselTests/BundleWire.scala
@@ -38,7 +38,7 @@ class BundleWireSpec extends ChiselPropSpec {
property("All vec elems should match the inputs") {
forAll(vecSizes, safeUInts, safeUInts) { (n: Int, x: Int, y: Int) =>
- assert(execute{ new BundleWireTester(n, x, y) })
+ assertTesterPasses{ new BundleWireTester(n, x, y) }
}
}
}