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authorJack Koenig2021-09-17 21:01:26 -0700
committerJack Koenig2021-09-17 21:01:26 -0700
commit5c8c19345e6711279594cf1f9ddab33623c8eba7 (patch)
treed9d6ced3934aa4a8be3dec19ddcefe50a7a93d5a /src/test/scala/chiselTests/BundleSpec.scala
parente63b9667d89768e0ec6dc8a9153335cb48a213a7 (diff)
parent958904cb2f2f65d02b2ab3ec6d9ec2e06d04e482 (diff)
Merge branch 'master' into 3.5-release
Diffstat (limited to 'src/test/scala/chiselTests/BundleSpec.scala')
-rw-r--r--src/test/scala/chiselTests/BundleSpec.scala34
1 files changed, 21 insertions, 13 deletions
diff --git a/src/test/scala/chiselTests/BundleSpec.scala b/src/test/scala/chiselTests/BundleSpec.scala
index 5d3f23ec..1d392f5c 100644
--- a/src/test/scala/chiselTests/BundleSpec.scala
+++ b/src/test/scala/chiselTests/BundleSpec.scala
@@ -129,6 +129,27 @@ class BundleSpec extends ChiselFlatSpec with BundleSpecUtils with Utils {
}).getMessage should include("aliased fields")
}
+ "Bundles" should "not have bound hardware" in {
+ (the[ChiselException] thrownBy extractCause[ChiselException] {
+ ChiselStage.elaborate { new Module {
+ class MyBundle(val foo: UInt) extends Bundle
+ val in = IO(Input(new MyBundle(123.U))) // This should error: value passed in instead of type
+ val out = IO(Output(new MyBundle(UInt(8.W))))
+
+ out := in
+ } }
+ }).getMessage should include("must be a Chisel type, not hardware")
+ }
+ "Bundles" should "not recursively contain aggregates with bound hardware" in {
+ (the[ChiselException] thrownBy extractCause[ChiselException] {
+ ChiselStage.elaborate { new Module {
+ class MyBundle(val foo: UInt) extends Bundle
+ val out = IO(Output(Vec(2, UInt(8.W))))
+ val in = IO(Input(new MyBundle(out(0)))) // This should error: Bound aggregate passed
+ out := in
+ } }
+ }).getMessage should include("must be a Chisel type, not hardware")
+ }
"Unbound bundles sharing a field" should "not error" in {
ChiselStage.elaborate {
new RawModule {
@@ -141,17 +162,4 @@ class BundleSpec extends ChiselFlatSpec with BundleSpecUtils with Utils {
}
}
}
-
- "Bound Data" should "have priority in setting ref over unbound Data" in {
- class MyModule extends RawModule {
- val foo = IO(new Bundle {
- val x = Output(UInt(8.W))
- })
- foo.x := 0.U // getRef on foo.x is None.get without fix
- val bar = new Bundle {
- val y = foo.x
- }
- }
- ChiselStage.emitChirrtl(new MyModule)
- }
}