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authorChick Markley2021-04-27 12:17:17 -0700
committerGitHub2021-04-27 12:17:17 -0700
commit6deb379b1d8bafc81a605f60476bf0f24eac60b4 (patch)
treeb12c7dfaea1948ec9a7fa2f389db0699b3d1daf4 /src/test/scala/chiselTests/BundleLiteralSpec.scala
parent23b3fe8a6a2db92599bb0775626425056d47d1de (diff)
Introduce VecLiterals (#1834)
This PR provides for support for Vec literals. They can be one of two forms Inferred: ``` Vec.Lit(0x1.U, 0x2.U) ``` or explicit: ``` Vec(2, UInt(4.W)).Lit(0 -> 0x1.U, 1 -> 0x2.U) ``` - Explicit form allows for partial, or sparse, literals. - Vec literals can be used as Register initializers - Arbitrary nesting (consistent with type constraints is allowed)
Diffstat (limited to 'src/test/scala/chiselTests/BundleLiteralSpec.scala')
-rw-r--r--src/test/scala/chiselTests/BundleLiteralSpec.scala23
1 files changed, 20 insertions, 3 deletions
diff --git a/src/test/scala/chiselTests/BundleLiteralSpec.scala b/src/test/scala/chiselTests/BundleLiteralSpec.scala
index 2a3ce2c9..b4adde4a 100644
--- a/src/test/scala/chiselTests/BundleLiteralSpec.scala
+++ b/src/test/scala/chiselTests/BundleLiteralSpec.scala
@@ -6,9 +6,8 @@ import chisel3._
import chisel3.stage.ChiselStage
import chisel3.testers.BasicTester
import chisel3.experimental.BundleLiterals._
-import chisel3.experimental.BundleLiteralException
-import chisel3.experimental.ChiselEnum
-import chisel3.experimental.FixedPoint
+import chisel3.experimental.VecLiterals.AddVecLiteralConstructor
+import chisel3.experimental.{BundleLiteralException, ChiselEnum, ChiselRange, FixedPoint, Interval}
class BundleLiteralSpec extends ChiselFlatSpec with Utils {
object MyEnum extends ChiselEnum {
@@ -76,6 +75,24 @@ class BundleLiteralSpec extends ChiselFlatSpec with Utils {
} }
}
+ "bundle literals of vec literals" should "work" in {
+ assertTesterPasses(new BasicTester {
+ val range = range"[0,4].2"
+ val bundleWithVecs = new Bundle {
+ val a = Vec(2, UInt(4.W))
+ val b = Vec(2, Interval(range))
+ }.Lit(
+ _.a -> Vec(2, UInt(4.W)).Lit(0 -> 0xA.U, 1 -> 0xB.U),
+ _.b -> Vec(2, Interval(range)).Lit(0 -> (1.5).I(range), 1 -> (0.25).I(range))
+ )
+ chisel3.assert(bundleWithVecs.a(0) === 0xA.U)
+ chisel3.assert(bundleWithVecs.a(1) === 0xB.U)
+ chisel3.assert(bundleWithVecs.b(0) === (1.5).I(range))
+ chisel3.assert(bundleWithVecs.b(1) === (0.25).I(range))
+ stop()
+ })
+ }
+
"partial bundle literals" should "work in RTL" in {
assertTesterPasses{ new BasicTester{
val bundleLit = (new MyBundle).Lit(_.a -> 42.U)