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authorHenry Cook2015-08-12 19:32:43 -0700
committerHenry Cook2015-08-12 19:32:57 -0700
commit85d7403f9bf7bc2b3520f924736c237f21f70ebd (patch)
tree64560f779063a419395a2fb8a31ea52c52af4404 /src/test/scala/ChiselTests/Rom.scala
parent7e69966362b1dbd9835695250494857f3a3767c8 (diff)
being to convert tests to scala-test; tests compile and run
Diffstat (limited to 'src/test/scala/ChiselTests/Rom.scala')
-rw-r--r--src/test/scala/ChiselTests/Rom.scala24
1 files changed, 0 insertions, 24 deletions
diff --git a/src/test/scala/ChiselTests/Rom.scala b/src/test/scala/ChiselTests/Rom.scala
deleted file mode 100644
index fb265b61..00000000
--- a/src/test/scala/ChiselTests/Rom.scala
+++ /dev/null
@@ -1,24 +0,0 @@
-package ChiselTests
-import Chisel._
-import Chisel.testers._
-
-class Rom extends Module {
- val io = new Bundle {
- val addr = UInt(INPUT, 4)
- val out = UInt(OUTPUT, 5)
- }
- val r = Vec(Range(0, 1 << 4).map(i => UInt(i * 2, width = 5)))
- io.out := r(io.addr)
-}
-
-
-class RomTester(c: Rom) extends Tester(c) {
- val r = Array.tabulate(1 << 4){ i => i * 2}
- for (i <- 0 until 10) {
- val a = rnd.nextInt(1 << 4)
- poke(c.io.addr, a)
- step(1)
- expect(c.io.out, r(a))
- }
-
-}