Revert "Make uselessly public fields in utils private" (#1417)

This reverts commit c279860c36a73984cd1b7b0ac6c213e8b44a7143.

2 files changed, 20 insertions, 20 deletions

diff --git a/src/main/scala/chisel3/util/Arbiter.scala b/src/main/scala/chisel3/util/Arbiter.scala
index 0a214581..e8c4ea8f 100644
--- a/src/main/scala/chisel3/util/Arbiter.scala
+++ b/src/main/scala/chisel3/util/Arbiter.scala
@@ -33,8 +33,8 @@ private object ArbiterCtrl {
 }
 
 abstract class LockingArbiterLike[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool]) extends Module {
-  protected def grant: Seq[Bool]
-  protected def choice: UInt
+  def grant: Seq[Bool]
+  def choice: UInt
   val io = IO(new ArbiterIO(gen, n))
 
   io.chosen := choice
@@ -63,16 +63,16 @@ abstract class LockingArbiterLike[T <: Data](gen: T, n: Int, count: Int, needsLo
 
 class LockingRRArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool] = None)
     extends LockingArbiterLike[T](gen, n, count, needsLock) {
-  private lazy val lastGrant = RegEnable(io.chosen, io.out.fire())
-  private lazy val grantMask = (0 until n).map(_.asUInt > lastGrant)
-  private lazy val validMask = io.in zip grantMask map { case (in, g) => in.valid && g }
+  lazy val lastGrant = RegEnable(io.chosen, io.out.fire())
+  lazy val grantMask = (0 until n).map(_.asUInt > lastGrant)
+  lazy val validMask = io.in zip grantMask map { case (in, g) => in.valid && g }
 
-  override protected def grant: Seq[Bool] = {
+  override def grant: Seq[Bool] = {
     val ctrl = ArbiterCtrl((0 until n).map(i => validMask(i)) ++ io.in.map(_.valid))
     (0 until n).map(i => ctrl(i) && grantMask(i) || ctrl(i + n))
   }
 
-  override protected lazy val choice = WireDefault((n-1).asUInt)
+  override lazy val choice = WireDefault((n-1).asUInt)
   for (i <- n-2 to 0 by -1)
     when (io.in(i).valid) { choice := i.asUInt }
   for (i <- n-1 to 1 by -1)
@@ -81,9 +81,9 @@ class LockingRRArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[
 
 class LockingArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T => Bool] = None)
     extends LockingArbiterLike[T](gen, n, count, needsLock) {
-  protected def grant: Seq[Bool] = ArbiterCtrl(io.in.map(_.valid))
+  def grant: Seq[Bool] = ArbiterCtrl(io.in.map(_.valid))
 
-  override protected lazy val choice = WireDefault((n-1).asUInt)
+  override lazy val choice = WireDefault((n-1).asUInt)
   for (i <- n-2 to 0 by -1)
     when (io.in(i).valid) { choice := i.asUInt }
 }
@@ -129,7 +129,7 @@ class Arbiter[T <: Data](gen: T, n: Int) extends Module {
     }
   }
 
-  private val grant = ArbiterCtrl(io.in.map(_.valid))
+  val grant = ArbiterCtrl(io.in.map(_.valid))
   for ((in, g) <- io.in zip grant)
     in.ready := g && io.out.ready
   io.out.valid := !grant.last || io.in.last.valid
diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala
index 0ed6984b..6a3aad24 100644
--- a/src/main/scala/chisel3/util/Decoupled.scala
+++ b/src/main/scala/chisel3/util/Decoupled.scala
@@ -206,16 +206,16 @@ class Queue[T <: Data](gen: T,
 
   val io = IO(new QueueIO(genType, entries))
 
-  private val ram = Mem(entries, genType)
-  private val enq_ptr = Counter(entries)
-  private val deq_ptr = Counter(entries)
-  private val maybe_full = RegInit(false.B)
+  val ram = Mem(entries, genType)
+  val enq_ptr = Counter(entries)
+  val deq_ptr = Counter(entries)
+  val maybe_full = RegInit(false.B)
 
-  private val ptr_match = enq_ptr.value === deq_ptr.value
-  private val empty = ptr_match && !maybe_full
-  private val full = ptr_match && maybe_full
-  private val do_enq = WireDefault(io.enq.fire())
-  private val do_deq = WireDefault(io.deq.fire())
+  val ptr_match = enq_ptr.value === deq_ptr.value
+  val empty = ptr_match && !maybe_full
+  val full = ptr_match && maybe_full
+  val do_enq = WireDefault(io.enq.fire())
+  val do_deq = WireDefault(io.deq.fire())
 
   when (do_enq) {
     ram(enq_ptr.value) := io.enq.bits
@@ -245,7 +245,7 @@ class Queue[T <: Data](gen: T,
     when (io.deq.ready) { io.enq.ready := true.B }
   }
 
-  private val ptr_diff = enq_ptr.value - deq_ptr.value
+  val ptr_diff = enq_ptr.value - deq_ptr.value
   if (isPow2(entries)) {
     io.count := Mux(maybe_full && ptr_match, entries.U, 0.U) | ptr_diff
   } else {