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authorducky2015-12-09 14:18:46 -0800
committerducky2015-12-09 14:46:06 -0800
commitcd016b42a0c940f671bdd3c117b8f0ae3c4b30b5 (patch)
tree4c54d1322e2464a0e5c2e25d03cb34b5f21e239f /src/main
parent035a30d25cdd955af6385c1334826781b17d894c (diff)
Extend TesterDriver to optionally take in additional Verilog sources
Diffstat (limited to 'src/main')
-rw-r--r--src/main/scala/Chisel/Driver.scala30
-rw-r--r--src/main/scala/Chisel/testers/TesterDriver.scala2
2 files changed, 22 insertions, 10 deletions
diff --git a/src/main/scala/Chisel/Driver.scala b/src/main/scala/Chisel/Driver.scala
index a31786d9..b57653c3 100644
--- a/src/main/scala/Chisel/Driver.scala
+++ b/src/main/scala/Chisel/Driver.scala
@@ -46,22 +46,34 @@ trait BackendCompilationUtilities {
dir)
}
+ /** Generates a Verilator invocation to convert Verilog sources to C++
+ * simulation sources.
+ *
+ * @param prefix output class name
+ * @param dir output directory
+ * @oaran vDut .v file containing the top-level DUR
+ * @param vSources list of additional Verilog sources to compile
+ * @param cppHarness C++ testharness to compile/link against
+ * @param vH .h file to generate
+ */
def verilogToCpp(
prefix: String,
dir: File,
vDut: File,
+ vSources: Seq[File],
cppHarness: File,
vH: File): ProcessBuilder =
Seq("verilator",
- "--cc", vDut.toString,
- "--assert",
- "--Wno-fatal",
- "--trace",
- "-O2",
- "+define+TOP_TYPE=V" + prefix,
- "-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$prefix -include ${vH.toString}""",
- "-Mdir", dir.toString,
- "--exe", cppHarness.toString)
+ "--cc", vDut.toString) ++
+ vSources.map(file => Seq("-v", file.toString)).flatten ++
+ Seq("--assert",
+ "--Wno-fatal",
+ "--trace",
+ "-O2",
+ "+define+TOP_TYPE=V" + prefix,
+ "-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$prefix -include ${vH.toString}""",
+ "-Mdir", dir.toString,
+ "--exe", cppHarness.toString)
def cppToExe(prefix: String, dir: File): ProcessBuilder =
Seq("make", "-C", dir.toString, "-j", "-f", s"V${prefix}.mk", s"V${prefix}")
diff --git a/src/main/scala/Chisel/testers/TesterDriver.scala b/src/main/scala/Chisel/testers/TesterDriver.scala
index d104782a..4c6134f0 100644
--- a/src/main/scala/Chisel/testers/TesterDriver.scala
+++ b/src/main/scala/Chisel/testers/TesterDriver.scala
@@ -29,7 +29,7 @@ object TesterDriver extends BackendCompilationUtilities with FileSystemUtilities
// Use sys.Process to invoke a bunch of backend stuff, then run the resulting exe
if (((new File(System.getProperty("user.dir") + "/src/main/resources/top.cpp") #> cppHarness) #&&
firrtlToVerilog(prefix, dir) #&&
- verilogToCpp(prefix, dir, vDut, cppHarness, vH) #&&
+ verilogToCpp(prefix, dir, vDut, Seq(), cppHarness, vH) #&&
cppToExe(prefix, dir)).! == 0) {
executeExpectingSuccess(prefix, dir)
} else {