diff options
| author | Richard Lin | 2017-08-17 17:24:02 -0700 |
|---|---|---|
| committer | Jack Koenig | 2017-08-17 17:24:02 -0700 |
| commit | 6e12ed9fd7a771eb30f44b8e1c4ab33f6ad8e0a6 (patch) | |
| tree | 0ff452193d515adc32ecccacb2b58daa9a1d95cb /src/main | |
| parent | 802cfc4405c28ae212a955a92c7a6ad2d2b6f0c2 (diff) | |
More of the bindings refactor (#635)
Rest of the binding refactor
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/chisel3/compatibility.scala | 50 | ||||
| -rw-r--r-- | src/main/scala/chisel3/package.scala | 62 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/Arbiter.scala | 4 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/BitPat.scala | 9 | ||||
| -rw-r--r-- | src/main/scala/chisel3/util/Decoupled.scala | 21 |
5 files changed, 124 insertions, 22 deletions
diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala index 4d2d9311..f181caba 100644 --- a/src/main/scala/chisel3/compatibility.scala +++ b/src/main/scala/chisel3/compatibility.scala @@ -46,7 +46,15 @@ package object Chisel { // scalastyle:ignore package.object.name type ChiselException = chisel3.internal.ChiselException type Data = chisel3.core.Data - val Wire = chisel3.core.Wire + object Wire extends chisel3.core.WireFactory { + import chisel3.core.CompileOptions + + def apply[T <: Data](dummy: Int = 0, init: T)(implicit compileOptions: CompileOptions): T = + chisel3.core.WireInit(init) + + def apply[T <: Data](t: T, init: T)(implicit compileOptions: CompileOptions): T = + chisel3.core.WireInit(t, init) + } object Clock { def apply(): Clock = new Clock @@ -82,7 +90,39 @@ package object Chisel { // scalastyle:ignore package.object.name } type Aggregate = chisel3.core.Aggregate - val Vec = chisel3.core.Vec + object Vec extends chisel3.core.VecFactory { + import chisel3.core.CompileOptions + import chisel3.internal.sourceinfo._ + + @deprecated("Vec argument order should be size, t; this will be removed by the official release", "chisel3") + def apply[T <: Data](gen: T, n: Int)(implicit compileOptions: CompileOptions): Vec[T] = + apply(n, gen) + + /** Creates a new [[Vec]] of length `n` composed of the result of the given + * function repeatedly applied. + * + * @param n number of elements (and the number of times the function is + * called) + * @param gen function that generates the [[Data]] that becomes the output + * element + */ + def fill[T <: Data](n: Int)(gen: => T)(implicit compileOptions: CompileOptions): Vec[T] = + apply(Seq.fill(n)(gen)) + + def apply[T <: Data](elts: Seq[T]): Vec[T] = macro VecTransform.apply_elts + def do_apply[T <: Data](elts: Seq[T])(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit(elts) + + def apply[T <: Data](elt0: T, elts: T*): Vec[T] = macro VecTransform.apply_elt0 + def do_apply[T <: Data](elt0: T, elts: T*) + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit(elt0 +: elts.toSeq) + + def tabulate[T <: Data](n: Int)(gen: (Int) => T): Vec[T] = macro VecTransform.tabulate + def do_tabulate[T <: Data](n: Int)(gen: (Int) => T) + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit.tabulate(n)(gen) + } type Vec[T <: Data] = chisel3.core.Vec[T] type VecLike[T <: Data] = chisel3.core.VecLike[T] type Record = chisel3.core.Record @@ -484,8 +524,8 @@ package object Chisel { // scalastyle:ignore package.object.name object experimental { // scalastyle:ignore object.name import scala.annotation.compileTimeOnly - class dump extends chisel3.internal.naming.dump - class treedump extends chisel3.internal.naming.treedump - class chiselName extends chisel3.internal.naming.chiselName + class dump extends chisel3.internal.naming.dump // scalastyle:ignore class.name + class treedump extends chisel3.internal.naming.treedump // scalastyle:ignore class.name + class chiselName extends chisel3.internal.naming.chiselName // scalastyle:ignore class.name } } diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala index d0d3a937..ee77ba23 100644 --- a/src/main/scala/chisel3/package.scala +++ b/src/main/scala/chisel3/package.scala @@ -14,13 +14,26 @@ package object chisel3 { // scalastyle:ignore package.object.name import chisel3.util._ import chisel3.internal.firrtl.Port + import chisel3.core.CompileOptions val Input = chisel3.core.Input val Output = chisel3.core.Output val Flipped = chisel3.core.Flipped type Data = chisel3.core.Data - val Wire = chisel3.core.Wire + object Wire extends chisel3.core.WireFactory { + import chisel3.core.CompileOptions + + @deprecated("Wire(init=init) is deprecated, use WireInit(init) instead", "chisel3") + def apply[T <: Data](dummy: Int = 0, init: T)(implicit compileOptions: CompileOptions): T = + chisel3.core.WireInit(init) + + @deprecated("Wire(t, init) is deprecated, use WireInit(t, init) instead", "chisel3") + def apply[T <: Data](t: T, init: T)(implicit compileOptions: CompileOptions): T = + chisel3.core.WireInit(t, init) + } + val WireInit = chisel3.core.WireInit + val Clock = chisel3.core.Clock type Clock = chisel3.core.Clock @@ -44,7 +57,37 @@ package object chisel3 { // scalastyle:ignore package.object.name } type Aggregate = chisel3.core.Aggregate - val Vec = chisel3.core.Vec + object Vec extends chisel3.core.VecFactory { + import scala.language.experimental.macros + import chisel3.core.CompileOptions + import chisel3.internal.sourceinfo._ + + @deprecated("Vec argument order should be size, t; this will be removed by the official release", "chisel3") + def apply[T <: Data](gen: T, n: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + apply(n, gen) + + @deprecated("Vec.fill(n)(gen) is deprecated, use VecInit(Seq.fill(n)(gen)) instead", "chisel3") + def fill[T <: Data](n: Int)(gen: => T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + apply(Seq.fill(n)(gen)) + + @deprecated("Vec(elts) is deprecated, use VecInit(elts) instead", "chisel3") + def apply[T <: Data](elts: Seq[T]): Vec[T] = macro VecTransform.apply_elts + def do_apply[T <: Data](elts: Seq[T])(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit(elts) + + @deprecated("Vec(elt0, ...) is deprecated, use VecInit(elt0, ...) instead", "chisel3") + def apply[T <: Data](elt0: T, elts: T*): Vec[T] = macro VecTransform.apply_elt0 + def do_apply[T <: Data](elt0: T, elts: T*) + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit(elt0 +: elts.toSeq) + + @deprecated("Vec.tabulate(n)(gen) is deprecated, use VecInit.tabulate(n)(gen) instead", "chisel3") + def tabulate[T <: Data](n: Int)(gen: (Int) => T): Vec[T] = macro VecTransform.tabulate + def do_tabulate[T <: Data](n: Int)(gen: (Int) => T) + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Vec[T] = + chisel3.core.VecInit.tabulate(n)(gen) + } + val VecInit = chisel3.core.VecInit type Vec[T <: Data] = chisel3.core.Vec[T] type VecLike[T <: Data] = chisel3.core.VecLike[T] type Bundle = chisel3.core.Bundle @@ -282,9 +325,12 @@ package object chisel3 { // scalastyle:ignore package.object.name final def != (that: BitPat): Bool = macro SourceInfoTransform.thatArg final def =/= (that: BitPat): Bool = macro SourceInfoTransform.thatArg - def do_=== (that: BitPat)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that === x // scalastyle:ignore method.name - def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that != x // scalastyle:ignore method.name - def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that =/= x // scalastyle:ignore method.name + def do_=== (that: BitPat) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that === x + def do_!= (that: BitPat) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that != x + def do_=/= (that: BitPat) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = that =/= x } @@ -364,8 +410,8 @@ package object chisel3 { // scalastyle:ignore package.object.name import scala.annotation.compileTimeOnly - class dump extends chisel3.internal.naming.dump - class treedump extends chisel3.internal.naming.treedump - class chiselName extends chisel3.internal.naming.chiselName + class dump extends chisel3.internal.naming.dump // scalastyle:ignore class.name + class treedump extends chisel3.internal.naming.treedump // scalastyle:ignore class.name + class chiselName extends chisel3.internal.naming.chiselName // scalastyle:ignore class.name } } diff --git a/src/main/scala/chisel3/util/Arbiter.scala b/src/main/scala/chisel3/util/Arbiter.scala index b99397e2..ba257b41 100644 --- a/src/main/scala/chisel3/util/Arbiter.scala +++ b/src/main/scala/chisel3/util/Arbiter.scala @@ -70,7 +70,7 @@ class LockingRRArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[ (0 until n).map(i => ctrl(i) && grantMask(i) || ctrl(i + n)) } - override protected lazy val choice = Wire(init=(n-1).asUInt) + override protected lazy val choice = WireInit((n-1).asUInt) for (i <- n-2 to 0 by -1) when (io.in(i).valid) { choice := i.asUInt } for (i <- n-1 to 1 by -1) @@ -81,7 +81,7 @@ class LockingArbiter[T <: Data](gen: T, n: Int, count: Int, needsLock: Option[T extends LockingArbiterLike[T](gen, n, count, needsLock) { protected def grant: Seq[Bool] = ArbiterCtrl(io.in.map(_.valid)) - override protected lazy val choice = Wire(init=(n-1).asUInt) + override protected lazy val choice = WireInit((n-1).asUInt) for (i <- n-2 to 0 by -1) when (io.in(i).valid) { choice := i.asUInt } } diff --git a/src/main/scala/chisel3/util/BitPat.scala b/src/main/scala/chisel3/util/BitPat.scala index 54ded155..c962813d 100644 --- a/src/main/scala/chisel3/util/BitPat.scala +++ b/src/main/scala/chisel3/util/BitPat.scala @@ -94,13 +94,16 @@ sealed class BitPat(val value: BigInt, val mask: BigInt, width: Int) { @deprecated("Use '=/=', which avoids potential precedence problems", "chisel3") def != (that: UInt): Bool = macro SourceInfoTransform.thatArg - def do_=== (that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { // scalastyle:ignore method.name + def do_=== (that: UInt) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { value.asUInt === (that & mask.asUInt) } - def do_=/= (that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { // scalastyle:ignore method.name + def do_=/= (that: UInt) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { !(this === that) } - def do_!= (that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { // scalastyle:ignore method.name + def do_!= (that: UInt) // scalastyle:ignore method.name + (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool = { this =/= that } } diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala index b9e1e7ed..5b4ed19d 100644 --- a/src/main/scala/chisel3/util/Decoupled.scala +++ b/src/main/scala/chisel3/util/Decoupled.scala @@ -184,6 +184,7 @@ class Queue[T <: Data](gen: T, val entries: Int, pipe: Boolean = false, flow: Boolean = false) + (implicit compileOptions: chisel3.core.CompileOptions) extends Module() { @deprecated("Module constructor with override _reset deprecated, use withReset", "chisel3") def this(gen: T, entries: Int, pipe: Boolean, flow: Boolean, override_reset: Option[Bool]) = { @@ -196,9 +197,21 @@ class Queue[T <: Data](gen: T, this.override_reset = Some(_reset) } - val io = IO(new QueueIO(gen, entries)) + val genType = if (compileOptions.declaredTypeMustBeUnbound) { + experimental.requireIsChiselType(gen) + gen + } else { + if (DataMirror.internal.isSynthesizable(gen)) { + println("WARNING: gen in new Queue(gen, ...) must be a Chisel type, not hardware") + gen.chiselCloneType + } else { + gen + } + } + + val io = IO(new QueueIO(genType, entries)) - private val ram = Mem(entries, gen) + private val ram = Mem(entries, genType) private val enq_ptr = Counter(entries) private val deq_ptr = Counter(entries) private val maybe_full = RegInit(false.B) @@ -206,8 +219,8 @@ class Queue[T <: Data](gen: T, private val ptr_match = enq_ptr.value === deq_ptr.value private val empty = ptr_match && !maybe_full private val full = ptr_match && maybe_full - private val do_enq = Wire(init=io.enq.fire()) - private val do_deq = Wire(init=io.deq.fire()) + private val do_enq = WireInit(io.enq.fire()) + private val do_deq = WireInit(io.deq.fire()) when (do_enq) { ram(enq_ptr.value) := io.enq.bits |
