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authorAlbert Magyar2019-01-22 11:13:35 -0800
committerGitHub2019-01-22 11:13:35 -0800
commit26660ff96d323e74c12d3ab0d43883c51188ff7c (patch)
tree8f649c7595d854aa5eb4e40a30b9a7d344d86254 /src/main
parent99bb15f13491637f1c7ce58edb5ba494efc810dc (diff)
Add Rocket Chip-style clonemodule as CloneModuleAsRecord to experimental (#943)
Diffstat (limited to 'src/main')
-rw-r--r--src/main/scala/chisel3/package.scala22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 3b1275f6..ddabf62c 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -436,6 +436,28 @@ package object chisel3 { // scalastyle:ignore package.object.name
val IO = chisel3.core.IO
+ // Rocket Chip-style clonemodule
+
+ /** A record containing the results of CloneModuleAsRecord
+ * The apply method is retrieves the element with the supplied name.
+ */
+ type ClonePorts = chisel3.core.BaseModule.ClonePorts
+
+ object CloneModuleAsRecord {
+ /** Clones an existing module and returns a record of all its top-level ports.
+ * Each element of the record is named with a string matching the
+ * corresponding port's name and shares the port's type.
+ * @example {{{
+ * val q1 = Module(new Queue(UInt(32.W), 2))
+ * val q2_io = CloneModuleAsRecord(q1)("io").asInstanceOf[q1.io.type]
+ * q2_io.enq <> q1.io.deq
+ * }}}
+ */
+ def apply(proto: BaseModule)(implicit sourceInfo: chisel3.internal.sourceinfo.SourceInfo, compileOptions: chisel3.core.CompileOptions): ClonePorts = {
+ chisel3.core.BaseModule.cloneIORecord(proto)
+ }
+ }
+
// Implicit conversions for BlackBox Parameters
implicit def fromIntToIntParam(x: Int): IntParam = IntParam(BigInt(x))
implicit def fromLongToIntParam(x: Long): IntParam = IntParam(BigInt(x))