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authorAndrew Waterman2015-12-11 18:06:31 -0800
committerAndrew Waterman2015-12-11 18:06:31 -0800
commite39a460a2bf6c1402bedb6f1c15ab99a7dee5a2b (patch)
treee9fca8caa5a7eb1acb123e270b46faae28667d52 /src/main/scala
parentb8cd46de6c01febdbdba7ecb83db494bad8a7a94 (diff)
parent1da50d910b5324497fb7bd0e69f84149a064792e (diff)
Merge pull request #68 from ucb-bar/counterdoc
Fix Counter doc
Diffstat (limited to 'src/main/scala')
-rw-r--r--src/main/scala/Chisel/util/Counter.scala5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/main/scala/Chisel/util/Counter.scala b/src/main/scala/Chisel/util/Counter.scala
index 356cedc8..3425b6a2 100644
--- a/src/main/scala/Chisel/util/Counter.scala
+++ b/src/main/scala/Chisel/util/Counter.scala
@@ -8,8 +8,9 @@ package Chisel
*/
class Counter(val n: Int) {
val value = if (n == 1) UInt(0) else Reg(init=UInt(0, log2Up(n)))
- /** Increment the counter this cycle. Returns whether the counter is at its
- * maximum (and will wrap around on the next inc() call).
+ /** Increment the counter, returning whether the counter currently is at the
+ * maximum and will wrap. The incremented value is registered and will be
+ * visible on the next cycle.
*/
def inc(): Bool = {
if (n == 1) {