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authorJim Lawson2016-09-28 09:33:11 -0700
committerGitHub2016-09-28 09:33:11 -0700
commit12a651513541d6c96e3b709b424d5d3384179076 (patch)
tree5fc05aacab0938b53dedd5375e644fb3dd3dff18 /src/main/scala
parent0c73611321cf12ff07c68e867f94430a329075e7 (diff)
parent2edfe895e4ff9f751c52904f73fe701502aa926a (diff)
Merge pull request #299 from ucb-bar/gsdt-decoupleddirection298
Don't use firrtlDirection for direction checks - fix #298.
Diffstat (limited to 'src/main/scala')
-rw-r--r--src/main/scala/chisel3/util/Decoupled.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala
index 36502862..70b191bd 100644
--- a/src/main/scala/chisel3/util/Decoupled.scala
+++ b/src/main/scala/chisel3/util/Decoupled.scala
@@ -84,7 +84,7 @@ object Decoupled
* @note unsafe (and will error) on the producer (input) side of an IrrevocableIO
*/
def apply[T <: Data](irr: IrrevocableIO[T]): DecoupledIO[T] = {
- require(getFirrtlDirection(irr.bits) == OUTPUT, "Only safe to cast produced Irrevocable bits to Decoupled.")
+ require(irr.bits.flatten forall (_.dir == OUTPUT), "Only safe to cast produced Irrevocable bits to Decoupled.")
val d = Wire(new DecoupledIO(irr.bits))
d.bits := irr.bits
d.valid := irr.valid
@@ -117,7 +117,7 @@ object Irrevocable
* @note unsafe (and will error) on the consumer (output) side of an DecoupledIO
*/
def apply[T <: Data](dec: DecoupledIO[T]): IrrevocableIO[T] = {
- require(getFirrtlDirection(dec.bits) == INPUT, "Only safe to cast consumed Decoupled bits to Irrevocable.")
+ require(dec.bits.flatten forall (_.dir == INPUT), "Only safe to cast consumed Decoupled bits to Irrevocable.")
val i = Wire(new IrrevocableIO(dec.bits))
dec.bits := i.bits
dec.valid := i.valid