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| author | Edward Wang | 2018-07-08 02:12:45 -0700 |
|---|---|---|
| committer | edwardcwang | 2018-08-22 11:55:38 -0700 |
| commit | f803eb8d8b7ef447d80710f94912f683c7a03771 (patch) | |
| tree | 7f6167a5bb9f5411119ad0452c5366e603717592 /src/main/scala/chisel3/util/util.scala | |
| parent | b6b00a9301198275697a8309b5a083359a5b4454 (diff) | |
MixedVec implementation
Diffstat (limited to 'src/main/scala/chisel3/util/util.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/util.scala | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/util.scala b/src/main/scala/chisel3/util/util.scala index 987678e3..164abdf8 100644 --- a/src/main/scala/chisel3/util/util.scala +++ b/src/main/scala/chisel3/util/util.scala @@ -11,5 +11,4 @@ package object util { type ValidIO[+T <: Data] = chisel3.util.Valid[T] val ValidIO = chisel3.util.Valid val DecoupledIO = chisel3.util.Decoupled - } |