diff options
| author | Jiuyang Liu | 2021-12-16 09:47:05 +0800 |
|---|---|---|
| committer | GitHub | 2021-12-16 01:47:05 +0000 |
| commit | 214115a4cdbf0714d3d1716035f5eb0dd98cba45 (patch) | |
| tree | 3faf1eef78c35af066a7aba687caab80a2e4d7e6 /src/main/scala/chisel3/util/experimental/decode/decoder.scala | |
| parent | 4ff431bb5c7978c9915bcd6080a4f27ef12ae607 (diff) | |
BitSet API (#2211)
BitSet is a new experimental parent type for BitPat.
It enables more complex operations on BitPats.
Co-authored-by: Ocean Shen <shenao6626@gmail.com>
Diffstat (limited to 'src/main/scala/chisel3/util/experimental/decode/decoder.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/experimental/decode/decoder.scala | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/experimental/decode/decoder.scala b/src/main/scala/chisel3/util/experimental/decode/decoder.scala index ee2ece48..e0bf83b2 100644 --- a/src/main/scala/chisel3/util/experimental/decode/decoder.scala +++ b/src/main/scala/chisel3/util/experimental/decode/decoder.scala @@ -5,7 +5,7 @@ package chisel3.util.experimental.decode import chisel3._ import chisel3.experimental.{ChiselAnnotation, annotate} import chisel3.util.{BitPat, pla} -import chisel3.util.experimental.getAnnotations +import chisel3.util.experimental.{BitSet, getAnnotations} import firrtl.annotations.Annotation import logger.LazyLogging @@ -80,4 +80,35 @@ object decoder extends LazyLogging { qmcFallBack(input, truthTable) } } + + + /** Generate a decoder circuit that matches the input to each bitSet. + * + * The resulting circuit functions like the following but is optimized with a logic minifier. + * {{{ + * when(input === bitSets(0)) { output := b000001 } + * .elsewhen (input === bitSets(1)) { output := b000010 } + * .... + * .otherwise { if (errorBit) output := b100000 else output := DontCare } + * }}} + * + * @param input input to the decoder circuit, width should be equal to bitSets.width + * @param bitSets set of ports to be matched, all width should be the equal + * @param errorBit whether generate an additional decode error bit at MSB of output. + * @return decoded wire + */ + def bitset(input: chisel3.UInt, bitSets: Seq[BitSet], errorBit: Boolean = false): chisel3.UInt = + chisel3.util.experimental.decode.decoder( + input, + chisel3.util.experimental.decode.TruthTable.fromString( + { + bitSets.zipWithIndex.flatMap { + case (bs, i) => + bs.terms.map(bp => + s"${bp.rawString}->${if (errorBit) "0"}${"0" * (bitSets.size - i - 1)}1${"0" * i}" + ) + } ++ Seq(s"${if (errorBit) "1"}${"?" * bitSets.size}") + }.mkString("\n") + ) + ) } |
