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authorJim Lawson2017-04-25 08:44:35 -0700
committerGitHub2017-04-25 08:44:35 -0700
commit4a6396ca5ff9dfba9019552012bce459ef3c3b1e (patch)
tree940018ca04febec6f3e18b1f03700fa3f203708e /src/main/scala/chisel3/util/Reg.scala
parentd439ac0144826bb170c43ae71df9782cdd0d5749 (diff)
Remove explicit import of NotStrict - fixes #492 (#494)
* Remove explicit import of NotStrict - fixes #492 * Provide macro for MemBase.apply(). * Provide macro for MemBase.apply(). Since a macro cannot override an abstract method, provide a concrete apply method n VecLike() that we can override with a macro. * Remove concrete apply() in VecLike. Since MemBase no longer extends the trait VecLike, we do not require a concrete method to which we can apply a macro to extract the appropriate CompileOptions.
Diffstat (limited to 'src/main/scala/chisel3/util/Reg.scala')
-rw-r--r--src/main/scala/chisel3/util/Reg.scala2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/main/scala/chisel3/util/Reg.scala b/src/main/scala/chisel3/util/Reg.scala
index e85a02fb..34c4d6d8 100644
--- a/src/main/scala/chisel3/util/Reg.scala
+++ b/src/main/scala/chisel3/util/Reg.scala
@@ -3,8 +3,6 @@
package chisel3.util
import chisel3._
-// TODO: remove this once we have CompileOptions threaded through the macro system.
-import chisel3.core.ExplicitCompileOptions.NotStrict
object RegEnable {
/** Returns a register with the specified next, update enable gate, and no reset initialization.