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| author | Jim Lawson | 2016-07-06 09:31:47 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-07-18 15:49:45 -0700 |
| commit | 12810b5efe6a8f872fbc1c63cdfb835ca354624f (patch) | |
| tree | 1fe4d0666e28f15880bbaf164592bd2bba1eff7c /src/main/scala/chisel3/util/Decoupled.scala | |
| parent | c5f9ea3133ef363ff8944e17d94fea79767b6bed (diff) | |
Update Chisel -> chisel3 references.
Diffstat (limited to 'src/main/scala/chisel3/util/Decoupled.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/Decoupled.scala | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala index 8e045855..339fde7c 100644 --- a/src/main/scala/chisel3/util/Decoupled.scala +++ b/src/main/scala/chisel3/util/Decoupled.scala @@ -3,7 +3,9 @@ /** Wrappers for ready-valid (Decoupled) interfaces and associated circuit generators using them. */ -package Chisel +package chisel3.util + +import chisel3._ /** An I/O Bundle with simple handshaking using valid and ready signals for data 'bits'*/ class DecoupledIO[+T <: Data](gen: T) extends Bundle |