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authorJack2022-07-30 22:41:15 +0000
committerJack2022-07-30 22:41:15 +0000
commit4cd44fa4dab370fcc5c20bcacc1fa0ee02327252 (patch)
tree05730be260feca0d2a870c4bb88325d36631a8fc /src/main/scala/chisel3/util/Counter.scala
parentfe9635ef21bad233945617a24ab16cfa4055f2d1 (diff)
parentbced77045c8fc5db37e40b159c49220929e15d46 (diff)
Merge branch '3.5.x' into 3.5-release
Diffstat (limited to 'src/main/scala/chisel3/util/Counter.scala')
-rw-r--r--src/main/scala/chisel3/util/Counter.scala7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/main/scala/chisel3/util/Counter.scala b/src/main/scala/chisel3/util/Counter.scala
index ef1eff9f..be6e3257 100644
--- a/src/main/scala/chisel3/util/Counter.scala
+++ b/src/main/scala/chisel3/util/Counter.scala
@@ -3,7 +3,7 @@
package chisel3.util
import chisel3._
-import chisel3.internal.naming.chiselName // can't use chisel3_ version because of compile order
+import chisel3.experimental.AffectsChiselPrefix
/** Used to generate an inline (logic directly in the containing Module, no internal Module is created)
* hardware counter.
@@ -27,8 +27,7 @@ import chisel3.internal.naming.chiselName // can't use chisel3_ version because
* }
* }}}
*/
-@chiselName
-class Counter private (r: Range, oldN: Option[Int] = None) {
+class Counter private (r: Range, oldN: Option[Int] = None) extends AffectsChiselPrefix {
require(r.length > 0, s"Counter range cannot be empty, got: $r")
require(r.start >= 0 && r.end >= 0, s"Counter range must be positive, got: $r")
@@ -113,7 +112,6 @@ object Counter {
* @return tuple of the counter value and whether the counter will wrap (the value is at
* maximum and the condition is true).
*/
- @chiselName
def apply(cond: Bool, n: Int): (UInt, Bool) = {
val c = new Counter(n)
val wrap = WireInit(false.B)
@@ -129,7 +127,6 @@ object Counter {
* @return tuple of the counter value and whether the counter will wrap (the value is at
* maximum and the condition is true).
*/
- @chiselName
def apply(r: Range, enable: Bool = true.B, reset: Bool = false.B): (UInt, Bool) = {
val c = new Counter(r)
val wrap = WireInit(false.B)