diff options
| author | Jim Lawson | 2016-09-30 12:13:58 -0700 |
|---|---|---|
| committer | GitHub | 2016-09-30 12:13:58 -0700 |
| commit | db25e8180a53fb8f4912fd37b7a613e15a01564f (patch) | |
| tree | 8bb5597746002ac98641f394cee4c94e1d154aff /src/main/scala/chisel3/util/Bitwise.scala | |
| parent | 785620b1403d827986bf60c2a001d8d6f71eed72 (diff) | |
| parent | 6edbdf279257d656b5eac38d9de8645a068611bf (diff) | |
Merge pull request #265 from ucb-bar/gsdt
Gsdt - Fixup to Chisel connections and direction - PR 200 revisited.
Diffstat (limited to 'src/main/scala/chisel3/util/Bitwise.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/Bitwise.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/Bitwise.scala b/src/main/scala/chisel3/util/Bitwise.scala index 7d5ffe09..289d27b1 100644 --- a/src/main/scala/chisel3/util/Bitwise.scala +++ b/src/main/scala/chisel3/util/Bitwise.scala @@ -38,7 +38,7 @@ object Fill { */ def apply(n: Int, x: UInt): UInt = { n match { - case 0 => UInt(width=0) + case 0 => UInt.width(0) case 1 => x case _ if x.isWidthKnown && x.getWidth == 1 => Mux(x.toBool, UInt((BigInt(1) << n) - 1, n), UInt(0, n)) |