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authorchick2016-02-25 11:03:15 -0800
committerchick2016-02-25 11:03:15 -0800
commit2e4d7869400f121bdae692f5c5b7976b1cb58438 (patch)
tree126bc92f5be2678ec5b46e609e828ebcbfe4e573 /src/main/scala/Chisel
parent3c0a67889280803c22fff441462d06bb5081a558 (diff)
Fixed comment punctuation and made it clearer that using an init() method for DeqIO and EnqIO initialization is likely to change.
Diffstat (limited to 'src/main/scala/Chisel')
-rw-r--r--src/main/scala/Chisel/util/Decoupled.scala25
1 files changed, 22 insertions, 3 deletions
diff --git a/src/main/scala/Chisel/util/Decoupled.scala b/src/main/scala/Chisel/util/Decoupled.scala
index e06e899a..ba33e6c7 100644
--- a/src/main/scala/Chisel/util/Decoupled.scala
+++ b/src/main/scala/Chisel/util/Decoupled.scala
@@ -23,11 +23,20 @@ object Decoupled {
}
/** An I/O bundle for enqueuing data with valid/ready handshaking
- * initialization must be handled, if necessary, by the parent circuit
+ * Initialization must be handled, if necessary, by the parent circuit
*/
class EnqIO[T <: Data](gen: T) extends DecoupledIO(gen)
{
+ /** push dat onto the output bits of this interface to let the consumer know it has happened.
+ * @param dat the values to assign to bits.
+ * @return dat.
+ */
def enq(dat: T): T = { valid := Bool(true); bits := dat; dat }
+
+ /** Initialize this Bundle. Valid is set to false, and all bits are set to zero.
+ * NOTE: This method of initialization is still being discussed and could change in the
+ * future.
+ */
def init(): Unit = {
valid := Bool(false)
for (io <- bits.flatten)
@@ -36,12 +45,22 @@ class EnqIO[T <: Data](gen: T) extends DecoupledIO(gen)
override def cloneType: this.type = { new EnqIO(gen).asInstanceOf[this.type]; }
}
-/** An I/O bundle for dequeuing data with valid/ready handshaking
- * initialization must be handled, if necessary, by the parent circuit
+/** An I/O bundle for dequeuing data with valid/ready handshaking.
+ * Initialization must be handled, if necessary, by the parent circuit
*/
class DeqIO[T <: Data](gen: T) extends DecoupledIO(gen) with Flipped
{
+ /** Assert ready on this port and return the associated data bits.
+ * This is typically used when valid has been asserted by the producer side.
+ * @param b ignored
+ * @return the data for this device,
+ */
def deq(b: Boolean = false): T = { ready := Bool(true); bits }
+
+ /** Initialize this Bundle.
+ * NOTE: This method of initialization is still being discussed and could change in the
+ * future.
+ */
def init(): Unit = {
ready := Bool(false)
}