Merge pull request #61 from ucb-bar/multivtest

Refactor test code generation, add support for additional .v files

1 files changed, 42 insertions, 33 deletions

diff --git a/src/main/scala/Chisel/Driver.scala b/src/main/scala/Chisel/Driver.scala
index a31786d9..7f950025 100644
--- a/src/main/scala/Chisel/Driver.scala
+++ b/src/main/scala/Chisel/Driver.scala
@@ -8,26 +8,20 @@ import java.io._
 import internal._
 import firrtl._
 
-trait FileSystemUtilities {
-  def writeTempFile(pre: String, post: String, contents: String): File = {
-    val t = File.createTempFile(pre, post)
-    val w = new FileWriter(t)
-    w.write(contents)
-    w.close()
-    t
-  }
-
-  // This "fire-and-forgets" the method, which can be lazily read through
-  // a Stream[String], and accumulates all errors on a StringBuffer
-  def sourceFilesAt(baseDir: String): (Stream[String], StringBuffer) = {
-    val buffer = new StringBuffer()
-    val cmd = Seq("find", baseDir, "-name", "*.scala", "-type", "f")
-    val lines = cmd lines_! ProcessLogger(buffer append _)
-    (lines, buffer)
+trait BackendCompilationUtilities {
+  /** Create a temporary directory with the prefix name. Exists here because it doesn't in Java 6.
+    */
+  def createTempDirectory(prefix: String): File = {
+    val temp = File.createTempFile(prefix, "")
+    if (!temp.delete()) {
+      throw new IOException(s"Unable to delete temp file '$temp'")
+    }
+    if (!temp.mkdir()) {
+      throw new IOException(s"Unable to create temp directory '$temp'")
+    }
+    temp
   }
-}
 
-trait BackendCompilationUtilities {
   def makeHarness(template: String => String, post: String)(f: File): File = {
     val prefix = f.toString.split("/").last
     val vf = new File(f.toString + post)
@@ -46,22 +40,38 @@ trait BackendCompilationUtilities {
       dir)
   }
 
+  /** Generates a Verilator invocation to convert Verilog sources to C++
+    * simulation sources.
+    *
+    * The Verilator prefix will be V$dutFile, and running this will generate
+    * C++ sources and headers as well as a makefile to compile them.
+    *
+    * Verilator will automatically locate the top-level module as the one among
+    * all the files which are not included elsewhere. If multiple ones exist,
+    * the compilation will fail.
+    *
+    * @param dutFile name of the DUT .v without the .v extension
+    * @param dir output directory
+    * @param vSources list of additional Verilog sources to compile
+    * @param cppHarness C++ testharness to compile/link against
+    */
   def verilogToCpp(
-      prefix: String,
+      dutFile: String,
       dir: File,
-      vDut: File,
-      cppHarness: File,
-      vH: File): ProcessBuilder =
+      vSources: Seq[File],
+      cppHarness: File): ProcessBuilder =
+
     Seq("verilator",
-        "--cc", vDut.toString,
-        "--assert",
-        "--Wno-fatal",
-        "--trace",
-        "-O2",
-        "+define+TOP_TYPE=V" + prefix,
-        "-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$prefix -include ${vH.toString}""",
-        "-Mdir", dir.toString,
-        "--exe", cppHarness.toString)
+        "--cc", s"$dutFile.v") ++
+        vSources.map(file => Seq("-v", file.toString)).flatten ++
+        Seq("--assert",
+            "--Wno-fatal",
+            "--trace",
+            "-O2",
+            "+define+TOP_TYPE=V" + dutFile,
+            "-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$dutFile -include V$dutFile.h""",
+            "-Mdir", dir.toString,
+            "--exe", cppHarness.toString)
 
   def cppToExe(prefix: String, dir: File): ProcessBuilder =
     Seq("make", "-C", dir.toString, "-j", "-f", s"V${prefix}.mk", s"V${prefix}")
@@ -79,10 +89,9 @@ trait BackendCompilationUtilities {
   def executeExpectingSuccess(prefix: String, dir: File): Boolean = {
     !executeExpectingFailure(prefix, dir)
   }
-
 }
 
-object Driver extends FileSystemUtilities with BackendCompilationUtilities {
+object Driver extends BackendCompilationUtilities {
 
   /** Elaborates the Module specified in the gen function into a Circuit
     *