diff options
| author | Andrew Waterman | 2015-07-29 15:13:02 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2015-07-29 15:13:02 -0700 |
| commit | 1fcd657529ea9ce6261c6808230ec816290ed5e2 (patch) | |
| tree | 9fe418a2c3de46092b6851abc73961805694248c /src/main/scala/Chisel/Core.scala | |
| parent | 71bfb1561a7673e44b1a05188f295c91a9a28c2a (diff) | |
Add newline at end of .fir file
Diffstat (limited to 'src/main/scala/Chisel/Core.scala')
| -rw-r--r-- | src/main/scala/Chisel/Core.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/Chisel/Core.scala b/src/main/scala/Chisel/Core.scala index 37f1f35a..9f0b1ce6 100644 --- a/src/main/scala/Chisel/Core.scala +++ b/src/main/scala/Chisel/Core.scala @@ -1195,5 +1195,5 @@ class Emitter { newline + emit(e.body) } } def emit(e: Circuit): String = - withIndent{ "circuit " + e.main + " : " + join0(e.components.map(x => emit(x)), newline) } + withIndent{ "circuit " + e.main + " : " + join0(e.components.map(x => emit(x)), newline) } + newline } |