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authormergify[bot]2021-11-21 05:45:01 +0000
committerGitHub2021-11-21 05:45:01 +0000
commit7adc8063570994dc87a9bfe151b6800d45e26bbc (patch)
treea69854ddb53c1b6540d78e3eb2b50d589168ccfe /docs/src/explanations/multi-clock.md
parentaadd08e1e88947b615749be139ce36f4fbbbedf0 (diff)
parent0a8bc71dde53f45672eb249454262a6a31c27e93 (diff)
Merge branch 'master' into update/sbt-mdoc-2.2.24
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title: "Multiple Clock Domains"
section: "chisel3"
---
+# Multiple Clock Domains
+
Chisel 3 supports multiple clock domains as follows.
Note that in order to cross clock domains safely, you will need appropriate synchronization logic (such as an asynchronous FIFO). You can use the [AsyncQueue library](https://github.com/ucb-bar/asyncqueue) to do this easily.