diff options
| author | mergify[bot] | 2022-07-13 20:39:44 +0000 |
|---|---|---|
| committer | GitHub | 2022-07-13 20:39:44 +0000 |
| commit | dbffb8779efca6bea8699ed80a04b1d47d657d93 (patch) | |
| tree | 20882275e5999549e8d0959d9acc83c3eb7bbc06 /core/src/main/scala/chisel3/internal/firrtl | |
| parent | c247be3fd94084cc21b5891c422319e103b47074 (diff) | |
New enhanced API for specifying Chisel to Firrtl Annotations (#2628) (#2631)
(cherry picked from commit 4b10cf7a276e90b280c1fd57070566acac3d80d3)
Co-authored-by: Girish Pai <girish.pai@sifive.com>
Diffstat (limited to 'core/src/main/scala/chisel3/internal/firrtl')
| -rw-r--r-- | core/src/main/scala/chisel3/internal/firrtl/IR.scala | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/core/src/main/scala/chisel3/internal/firrtl/IR.scala b/core/src/main/scala/chisel3/internal/firrtl/IR.scala index 9327c29e..dc9ab027 100644 --- a/core/src/main/scala/chisel3/internal/firrtl/IR.scala +++ b/core/src/main/scala/chisel3/internal/firrtl/IR.scala @@ -861,7 +861,40 @@ case class DefBlackBox( params: Map[String, Param]) extends Component -case class Circuit(name: String, components: Seq[Component], annotations: Seq[ChiselAnnotation], renames: RenameMap) { - def firrtlAnnotations: Iterable[Annotation] = annotations.flatMap(_.toFirrtl.update(renames)) +case class Circuit( + name: String, + components: Seq[Component], + @deprecated("Do not use annotations val of Circuit directly - use firrtlAnnotations instead. Will be removed in a future release", + "Chisel 3.5") + annotations: Seq[ChiselAnnotation], + renames: RenameMap, + @deprecated("Do not use newAnnotations val of Circuit directly - use firrtlAnnotations instead. Will be removed in a future release", + "Chisel 3.5") + + newAnnotations: Seq[ChiselMultiAnnotation]) { + + def this(name: String, components: Seq[Component], annotations: Seq[ChiselAnnotation], renames: RenameMap) = + this(name, components, annotations, renames, Seq.empty) + + def firrtlAnnotations: Iterable[Annotation] = + annotations.flatMap(_.toFirrtl.update(renames)) ++ newAnnotations.flatMap( + _.toFirrtl.flatMap(_.update(renames)) + ) + + def copy( + name: String = name, + components: Seq[Component] = components, + annotations: Seq[ChiselAnnotation] = annotations, + renames: RenameMap = renames + ) = Circuit(name, components, annotations, renames, newAnnotations) + +} +object Circuit + extends scala.runtime.AbstractFunction4[String, Seq[Component], Seq[ChiselAnnotation], RenameMap, Circuit] { + def unapply(c: Circuit): Option[(String, Seq[Component], Seq[ChiselAnnotation], RenameMap)] = { + Some((c.name, c.components, c.annotations, c.renames)) + } + def apply(name: String, components: Seq[Component], annotations: Seq[ChiselAnnotation], renames: RenameMap): Circuit = + new Circuit(name, components, annotations, renames) } |
