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authorAlbert Magyar2020-07-21 17:40:16 -0700
committerGitHub2020-07-21 17:40:16 -0700
commit473a13877c60ba9fb13de47542a8397412c2b967 (patch)
tree159cec6aa6ece2e87ceffbdc56a553fe71d0726b /core/src/main/scala/chisel3/SIntFactory.scala
parent4a0e828cfe76e0d3bd6c4a0cc593589fe74ed0ba (diff)
parente5568f55a6a149adfd19ad04b264a69078288f86 (diff)
Merge pull request #1519 from freechipsproject/no-scalastyle
Remove scalastyle configurations
Diffstat (limited to 'core/src/main/scala/chisel3/SIntFactory.scala')
-rw-r--r--core/src/main/scala/chisel3/SIntFactory.scala1
1 files changed, 0 insertions, 1 deletions
diff --git a/core/src/main/scala/chisel3/SIntFactory.scala b/core/src/main/scala/chisel3/SIntFactory.scala
index c1c6b1db..35bab7c2 100644
--- a/core/src/main/scala/chisel3/SIntFactory.scala
+++ b/core/src/main/scala/chisel3/SIntFactory.scala
@@ -16,7 +16,6 @@ trait SIntFactory {
}
/** Create an SInt literal with specified width. */
- // scalastyle:off method.name
protected[chisel3] def Lit(value: BigInt, width: Width): SInt = {
val lit = SLit(value, width)
val result = new SInt(lit.width)