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authorKevin Laeufer2021-09-23 11:12:26 -0700
committerGitHub2021-09-23 18:12:26 +0000
commitd1d38bd096fce8b92468720fbedc835ecda40e6b (patch)
treee41c8ea472ba012214d1816afb4e4d595f9aaf67 /core/src/main/scala/chisel3/Printf.scala
parent810f3cdffcb7acc6b7e41e070fb956987aee3806 (diff)
make all verification statements publically available (#2089)
Diffstat (limited to 'core/src/main/scala/chisel3/Printf.scala')
-rw-r--r--core/src/main/scala/chisel3/Printf.scala3
1 files changed, 1 insertions, 2 deletions
diff --git a/core/src/main/scala/chisel3/Printf.scala b/core/src/main/scala/chisel3/Printf.scala
index cf7821b8..be0146bb 100644
--- a/core/src/main/scala/chisel3/Printf.scala
+++ b/core/src/main/scala/chisel3/Printf.scala
@@ -6,7 +6,6 @@ import scala.language.experimental.macros
import chisel3.internal._
import chisel3.internal.Builder.pushCommand
import chisel3.internal.sourceinfo.SourceInfo
-import chisel3.experimental.BaseSim
/** Prints a message in simulation
*
@@ -34,7 +33,7 @@ object printf {
}
/** Named class for [[printf]]s. */
- final class Printf(val pable: Printable) extends BaseSim
+ final class Printf private[chisel3](val pable: Printable) extends VerificationStatement
/** Prints a message in simulation
*