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authorJack Koenig2020-10-12 21:02:27 -0700
committerJack Koenig2021-02-09 17:28:07 -0800
commit0a0d7c6aac4326f2127d6d95efa5a4e10c81946c (patch)
tree89a42cf3ae9eb96b02a54bc83040c04cd1ea294d /core/src/main/scala/chisel3/Data.scala
parent53b620478ddab1faa96512e473fa198f7f1fcf50 (diff)
Make it possible to GC Data instances
No longer create a pointer from parent to every HasId, only do it by default for BaseModules and MemBases. Add pointer from parent to Data upon binding the Data. * Add MemTypeBinding for port types of Mems This binding is similar to the SampleElementBinding for Vecs in that these Data are not truly hardware, but are represented in the FIRRTL IR and thus need some representation. * Call _onModuleClose on unbound Records This maintains some corner-case behavior that is nevertheless relied upon. It ensures that refs are set for the elements of Records, even if they are not bound to any real hardware.
Diffstat (limited to 'core/src/main/scala/chisel3/Data.scala')
-rw-r--r--core/src/main/scala/chisel3/Data.scala5
1 files changed, 3 insertions, 2 deletions
diff --git a/core/src/main/scala/chisel3/Data.scala b/core/src/main/scala/chisel3/Data.scala
index 332527bf..377a94e6 100644
--- a/core/src/main/scala/chisel3/Data.scala
+++ b/core/src/main/scala/chisel3/Data.scala
@@ -339,13 +339,14 @@ abstract class Data extends HasId with NamedComponent with SourceInfoDoc {
private[chisel3] final def isSynthesizable: Boolean = _binding.map {
case ChildBinding(parent) => parent.isSynthesizable
case _: TopBinding => true
- case _: SampleElementBinding[_] => false
+ case (_: SampleElementBinding[_] | _: MemTypeBinding[_]) => false
}.getOrElse(false)
private[chisel3] def topBindingOpt: Option[TopBinding] = _binding.flatMap {
case ChildBinding(parent) => parent.topBindingOpt
case bindingVal: TopBinding => Some(bindingVal)
case SampleElementBinding(parent) => parent.topBindingOpt
+ case _: MemTypeBinding[_] => None
}
private[chisel3] def topBinding: TopBinding = topBindingOpt.get
@@ -355,7 +356,7 @@ abstract class Data extends HasId with NamedComponent with SourceInfoDoc {
* node is the top-level.
* binding and direction are valid after this call completes.
*/
- private[chisel3] def bind(target: Binding, parentDirection: SpecifiedDirection = SpecifiedDirection.Unspecified)
+ private[chisel3] def bind(target: Binding, parentDirection: SpecifiedDirection = SpecifiedDirection.Unspecified): Unit
// Both _direction and _resolvedUserDirection are saved versions of computed variables (for
// efficiency, avoid expensive recomputation of frequent operations).