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authorAlbert Magyar2020-07-20 12:11:44 -0700
committerAlbert Magyar2020-07-21 13:06:53 -0700
commit7e9f424fb7dcd11c894ceb9f6f049fd9eda80632 (patch)
tree1fa15e357d0af7b82316fa2ee659e2e98118488c /core/src/main/scala/chisel3/Annotation.scala
parent4a0e828cfe76e0d3bd6c4a0cc593589fe74ed0ba (diff)
Delete outdated scalastyle configuration comments from source
Diffstat (limited to 'core/src/main/scala/chisel3/Annotation.scala')
-rw-r--r--core/src/main/scala/chisel3/Annotation.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/core/src/main/scala/chisel3/Annotation.scala b/core/src/main/scala/chisel3/Annotation.scala
index e54b1bf9..104fc575 100644
--- a/core/src/main/scala/chisel3/Annotation.scala
+++ b/core/src/main/scala/chisel3/Annotation.scala
@@ -39,7 +39,7 @@ final case class ChiselLegacyAnnotation private[chisel3] (
}
private[chisel3] object ChiselLegacyAnnotation
-object annotate { // scalastyle:ignore object.name
+object annotate {
def apply(anno: ChiselAnnotation): Unit = {
Builder.annotations += anno
}
@@ -82,7 +82,7 @@ object annotate { // scalastyle:ignore object.name
* in [[chisel3.Driver]] will pass the annotations to FIRRTL automatically.
*/
-object doNotDedup { // scalastyle:ignore object.name
+object doNotDedup {
/** Marks a module to be ignored in Dedup Transform in Firrtl
*
* @param module The module to be marked