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authorJack2022-07-30 22:41:15 +0000
committerJack2022-07-30 22:41:15 +0000
commit4cd44fa4dab370fcc5c20bcacc1fa0ee02327252 (patch)
tree05730be260feca0d2a870c4bb88325d36631a8fc /core/src/main/scala/chisel3/Annotation.scala
parentfe9635ef21bad233945617a24ab16cfa4055f2d1 (diff)
parentbced77045c8fc5db37e40b159c49220929e15d46 (diff)
Merge branch '3.5.x' into 3.5-release
Diffstat (limited to 'core/src/main/scala/chisel3/Annotation.scala')
-rw-r--r--core/src/main/scala/chisel3/Annotation.scala11
1 files changed, 11 insertions, 0 deletions
diff --git a/core/src/main/scala/chisel3/Annotation.scala b/core/src/main/scala/chisel3/Annotation.scala
index e08557eb..c350fb30 100644
--- a/core/src/main/scala/chisel3/Annotation.scala
+++ b/core/src/main/scala/chisel3/Annotation.scala
@@ -20,6 +20,14 @@ trait ChiselAnnotation {
def toFirrtl: Annotation
}
+/** Enhanced interface for Annotations in Chisel
+ *
+ * Defines a conversion to corresponding FIRRTL Annotation(s)
+ */
+trait ChiselMultiAnnotation {
+ def toFirrtl: Seq[Annotation]
+}
+
/** Mixin for [[ChiselAnnotation]] that instantiates an associated FIRRTL Transform when this Annotation is present
* during a run of
* [[Driver$.execute(args:Array[String],dut:()=>chisel3\.RawModule)* Driver.execute]].
@@ -34,6 +42,9 @@ object annotate {
def apply(anno: ChiselAnnotation): Unit = {
Builder.annotations += anno
}
+ def apply(annos: ChiselMultiAnnotation): Unit = {
+ Builder.newAnnotations += annos
+ }
}
/** Marks that a module to be ignored in Dedup Transform in Firrtl pass