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authorJack Koenig2017-12-13 20:23:13 -0800
committeredwardcwang2017-12-13 22:09:55 -0800
commitb657a2d5de6d53d5ce7da28908c89773e35083a8 (patch)
tree424c44f92546df07df99b1b60a71db123450ce02 /chiselFrontend
parent66f958d5b856b1633e18c567bb0f838c2291f4f6 (diff)
Fix some ScalaDoc warnings
Diffstat (limited to 'chiselFrontend')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala14
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala6
2 files changed, 11 insertions, 9 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
index 88cc6ff6..a4eeb8a5 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
@@ -118,11 +118,13 @@ object Vec extends VecFactory
/** A vector (array) of [[Data]] elements. Provides hardware versions of various
* collection transformation functions found in software array implementations.
*
- * Careful consideration should be given over the use of [[Vec]] vs [[Seq]] or some other scala collection. In
- * general [[Vec]] only needs to be used when there is a need to express the hardware collection in a [[Reg]]
- * or IO [[Bundle]] or when access to elements of the array is indexed via a hardware signal.
+ * Careful consideration should be given over the use of [[Vec]] vs
+ * [[scala.collection.immutable.Seq Seq]] or some other Scala collection. In general [[Vec]] only
+ * needs to be used when there is a need to express the hardware collection in a [[Reg]] or IO
+ * [[Bundle]] or when access to elements of the array is indexed via a hardware signal.
*
- * Example of indexing into a [[Vec]] using a hardware address and where the [[Vec]] is defined in an IO [[Bundle]]
+ * Example of indexing into a [[Vec]] using a hardware address and where the [[Vec]] is defined in
+ * an IO [[Bundle]]
*
* {{{
* val io = IO(new Bundle {
@@ -468,7 +470,7 @@ abstract class Record(private[chisel3] implicit val compileOptions: CompileOptio
}
/** Default "pretty-print" implementation
* Analogous to printing a Map
- * Results in "$className(elt0.name -> elt0.value, ...)"
+ * Results in "`\$className(elt0.name -> elt0.value, ...)`"
*/
def toPrintable: Printable = toPrintableHelper(elements.toList)
}
@@ -581,7 +583,7 @@ class Bundle(implicit compileOptions: CompileOptions) extends Record {
/** Default "pretty-print" implementation
* Analogous to printing a Map
- * Results in "Bundle(elt0.name -> elt0.value, ...)"
+ * Results in "`Bundle(elt0.name -> elt0.value, ...)`"
* @note The order is reversed from the order of elements in order to print
* the fields in the order they were defined
*/
diff --git a/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala b/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
index 07546406..98253ce5 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/ChiselAnnotation.scala
@@ -45,9 +45,9 @@ case class ChiselAnnotation(component: InstanceId, transformClass: Class[_ <: Tr
* }
* }}}
*
- * @note Calling this on Data creates an annotation that Chisel emits to a separate annotations
- * file. This file must be passed to Firrtl independently of the .fir file.
- * [[chisel3.Driver.execute]] will do this automatically.
+ * @note Calling this on [[Data]] creates an annotation that Chisel emits to a separate annotations
+ * file. This file must be passed to FIRRTL independently of the `.fir` file. The execute methods
+ * in [[chisel3.Driver]] will pass the annotations to FIRRTL automatically.
*/
object dontTouch { // scalastyle:ignore object.name
/** Marks a signal to be preserved in Chisel and Firrtl