summaryrefslogtreecommitdiff
path: root/chiselFrontend
diff options
context:
space:
mode:
authorAdam Izraelevitz2017-02-22 17:19:07 -0800
committerAngie Wang2017-02-22 17:19:07 -0800
commit455f551d7bf30a7f8c99631bd2afe080c551237b (patch)
tree9735c70d488890cba1208da372ed157988a4e2df /chiselFrontend
parent4310b9e5cd1f244affd3f5ea68f8c4e7c3432f91 (diff)
Bugfix #513. Fix BPSet width inference in Chisel3 (#523)
* Bugfix #513. Needs better test case * Improved test
Diffstat (limited to 'chiselFrontend')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Bits.scala8
1 files changed, 6 insertions, 2 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
index a5aca9f3..cea2a679 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
@@ -853,8 +853,12 @@ sealed class FixedPoint private (width: Width, val binaryPoint: BinaryPoint, lit
final def setBinaryPoint(that: Int): FixedPoint = macro SourceInfoTransform.thatArg
- def do_setBinaryPoint(that: Int)(implicit sourceInfo: SourceInfo): FixedPoint =
- binop(sourceInfo, FixedPoint(this.width, KnownBinaryPoint(that)), SetBinaryPoint, that)
+ def do_setBinaryPoint(that: Int)(implicit sourceInfo: SourceInfo): FixedPoint = this.binaryPoint match {
+ case KnownBinaryPoint(value) =>
+ binop(sourceInfo, FixedPoint(this.width + (that - value), KnownBinaryPoint(that)), SetBinaryPoint, that)
+ case _ =>
+ binop(sourceInfo, FixedPoint(UnknownWidth(), KnownBinaryPoint(that)), SetBinaryPoint, that)
+ }
/** Returns this wire bitwise-inverted. */
def do_unary_~ (implicit sourceInfo: SourceInfo): FixedPoint =