diff options
| author | Schuyler Eldridge | 2018-08-07 16:54:34 -0400 |
|---|---|---|
| committer | Jack Koenig | 2018-08-07 13:54:34 -0700 |
| commit | b3bd3c430d39e344dc6224717efeca26c9c91378 (patch) | |
| tree | 31154b186066dca43237bde038db4c2b188b0f88 /chiselFrontend/src | |
| parent | 4de6848ef746ca40945dc95a113e820bc7265cea (diff) | |
BoringUtils / Synthesizable Cross Module References (#718)
This adds an annotator that provides a linkage to the FIRRTL
WiringTransform. This enables synthesizable cross module references
between one source and multiple sinks without changing IO (the
WiringTransform bores through the hierarchy).
Per WiringTransform, this will connect sources to their closest
sinks (as determined by BFS) or fail if ownership is indeterminate.
Make TesterDriver.execute work like Driver.execute:
- annotations are included when running FIRRTL
- custom transforms are run automatically
Also, add a bore method to BoringUtils that allows you to do one source to
multi-sink mapping in a single call. This adds a test that this is doing
the same thing as the equivalent call via disjoint addSink/addSource.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'chiselFrontend/src')
0 files changed, 0 insertions, 0 deletions
