diff options
| author | Schuyler Eldridge | 2019-07-30 22:47:34 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2019-08-01 11:12:47 -0400 |
| commit | 6c65a28756b8bb615479b1bcc420b28994419700 (patch) | |
| tree | 059f29769a09d423b1f4e274ecce56ce570c0467 /chiselFrontend/src | |
| parent | 99cff159209ba1cc0f69f5afd2497d4bad79fbc5 (diff) | |
Flatten *FactoryBase hierarchy
This renames all *FactoryBase traits to *Factory, removes
transparent *Factory objects, and propagates this flattened hierarchy
throughout the codebase.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'chiselFrontend/src')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/Bits.scala | 10 | ||||
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/package.scala | 15 |
2 files changed, 5 insertions, 20 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/Bits.scala b/chiselFrontend/src/main/scala/chisel3/Bits.scala index 804c1a2e..f50512f0 100644 --- a/chiselFrontend/src/main/scala/chisel3/Bits.scala +++ b/chiselFrontend/src/main/scala/chisel3/Bits.scala @@ -905,7 +905,7 @@ sealed class UInt private[chisel3] (width: Width) extends Bits(width) with Num[U } // This is currently a factory because both Bits and UInt inherit it. -trait UIntFactoryBase { +trait UIntFactory { /** Create a UInt type with inferred width. */ def apply(): UInt = apply(Width()) /** Create a UInt port with specified width. */ @@ -1158,7 +1158,7 @@ sealed class SInt private[chisel3] (width: Width) extends Bits(width) with Num[S } } -trait SIntFactoryBase { +trait SIntFactory { /** Create an SInt type with inferred width. */ def apply(): SInt = apply(Width()) /** Create a SInt type or port with fixed width. */ @@ -1181,7 +1181,7 @@ trait SIntFactoryBase { } } -object SInt extends SIntFactoryBase +object SInt extends SIntFactory sealed trait Reset extends Element with ToBoolable @@ -1288,7 +1288,7 @@ sealed class Bool() extends UInt(1.W) with Reset { def do_asClock(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Clock = pushOp(DefPrim(sourceInfo, Clock(), AsClockOp, ref)) } -trait BoolFactoryBase { +trait BoolFactory { /** Creates an empty Bool. */ def apply(): Bool = new Bool() @@ -1303,7 +1303,7 @@ trait BoolFactoryBase { } } -object Bool extends BoolFactoryBase +object Bool extends BoolFactory package experimental { //scalastyle:off number.of.methods diff --git a/chiselFrontend/src/main/scala/chisel3/package.scala b/chiselFrontend/src/main/scala/chisel3/package.scala index dee07297..4a240a8c 100644 --- a/chiselFrontend/src/main/scala/chisel3/package.scala +++ b/chiselFrontend/src/main/scala/chisel3/package.scala @@ -135,21 +135,6 @@ package object chisel3 { // scalastyle:ignore package.object.name // (UInt|SInt)\(([_a-zA-Z][_0-9a-zA-Z]*),\s*(?:width\s*=)?\s*(\d+|[_a-zA-Z][_0-9a-zA-Z]*)\) // => $2.as$1($3.W) - /** This contains literal constructor factory methods that are deprecated as of Chisel3. - * These will be removed very soon. It's recommended you port your code ASAP. - */ - trait UIntFactory extends UIntFactoryBase - - /** This contains literal constructor factory methods that are deprecated as of Chisel3. - * These will be removed very soon. It's recommended you move your code soon. - */ - trait SIntFactory extends SIntFactoryBase - - /** This contains literal constructor factory methods that are deprecated as of Chisel3. - * These will be removed very soon. It's recommended you move your code soon. - */ - trait BoolFactory extends BoolFactoryBase - object Bits extends UIntFactory object UInt extends UIntFactory object SInt extends SIntFactory |
