Changed T to _T for generated names (#349)

Prefix temporary names with underscores so Verilator won't trace them
Use verilator argument "--trace-underscore" if you want to trace these
signals

2 files changed, 2 insertions, 2 deletions

diff --git a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala
index c1352566..7fe429fa 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala
@@ -42,7 +42,7 @@ abstract class BlackBox extends Module {
     // Doing so would cause the wrong names to be assigned, since their parent
     // is now the module itself instead of the io bundle.
     for (id <- _ids; if id ne io) {
-      id.forceName(default="T", _namespace)
+      id.forceName(default="_T", _namespace)
       id._onModuleClose
     }
     this
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
index c700dc1b..c3353d85 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
@@ -191,7 +191,7 @@ extends HasId {
     }
 
     // All suggestions are in, force names to every node.
-    _ids.foreach(_.forceName(default="T", _namespace))
+    _ids.foreach(_.forceName(default="_T", _namespace))
     _ids.foreach(_._onModuleClose)
     this
   }