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| author | Edward Wang | 2019-04-10 00:16:48 -0700 |
|---|---|---|
| committer | edwardcwang | 2019-04-19 13:02:34 -0700 |
| commit | 32acdcf63ab74e7d47d7600f2211a72dd19280c3 (patch) | |
| tree | e4ff45be46e9353a06814aeecb9207284df388e8 /chiselFrontend/src/main/scala/chisel3/internal | |
| parent | fe5571d5218149ead6df36c82485bce8e31a223f (diff) | |
Fix wrong directionality for Vec(Flipped())
Create Chisel IR Port() in a way that Converter is happy with.
Also add more extensive test suite for future-proofing.
Close #1063
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/internal')
0 files changed, 0 insertions, 0 deletions