Refactor Annotations (#767)

* Generalize ChiselAnnotation

This allows us to delay creation of Annotations till elaboration is
complete. Also update all annotation-related code.

* Add RunFirrtlTransform

Use a Chisel-specific RunFirrtlTransform API to preserve behavior of old
ChiselAnnotation (now called ChiselLegacyAnnotation)

* Use unique test directories in ChiselRunners.compile

1 files changed, 1 insertions, 3 deletions

diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala b/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
index b499c2b1..6b555a82 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
+++ b/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
@@ -7,8 +7,6 @@ import core._
 import chisel3.internal._
 import chisel3.internal.sourceinfo.{SourceInfo, NoSourceInfo}
 
-import _root_.firrtl.annotations.Annotation
-
 case class PrimOp(val name: String) {
   override def toString: String = name
 }
@@ -278,4 +276,4 @@ abstract class Component extends Arg {
 case class DefModule(id: UserModule, name: String, ports: Seq[Port], commands: Seq[Command]) extends Component
 case class DefBlackBox(id: BaseBlackBox, name: String, ports: Seq[Port], topDir: SpecifiedDirection, params: Map[String, Param]) extends Component
 
-case class Circuit(name: String, components: Seq[Component], annotations: Seq[Annotation] = Seq.empty)
+case class Circuit(name: String, components: Seq[Component], annotations: Seq[ChiselAnnotation] = Seq.empty)