diff options
| author | Richard Lin | 2018-02-07 13:49:15 -0800 |
|---|---|---|
| committer | GitHub | 2018-02-07 13:49:15 -0800 |
| commit | 254597c125bda06e041a4a241177e959200ce8f7 (patch) | |
| tree | d67e6bb0212c17ac19e095aff6d2edb8b92e6bf9 /chiselFrontend/src/main/scala/chisel3/core/UserModule.scala | |
| parent | 7be9b1c681558695b95fccb22a60c34101c86118 (diff) | |
Cloning IO with compatibility 🦆 (#754)
Changes the API such that IO(...) clones. All Bundles will need to be clone-able, but auto clone type is expected to handle most cases.
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/UserModule.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/UserModule.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala index 1411fa80..17b8a09e 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala @@ -157,7 +157,7 @@ abstract class LegacyModule(implicit moduleCompileOptions: CompileOptions) def io: Record // Allow access to bindings from the compatibility package - protected def _ioPortBound() = portsContains(io) + protected def _compatIoPortBound() = portsContains(io) protected override def nameIds(rootClass: Class[_]): HashMap[HasId, String] = { val names = super.nameIds(rootClass) @@ -171,7 +171,7 @@ abstract class LegacyModule(implicit moduleCompileOptions: CompileOptions) } private[core] override def generateComponent(): Component = { - _autoWrapPorts() // pre-IO(...) compatibility hack + _compatAutoWrapPorts() // pre-IO(...) compatibility hack // Restrict IO to just io, clock, and reset require(io != null, "Module must have io") |