diff options
| author | Jim Lawson | 2016-07-06 10:01:23 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-07-18 15:17:56 -0700 |
| commit | c5f9ea3133ef363ff8944e17d94fea79767b6bed (patch) | |
| tree | cc80a6df1eb58f0feaf9f138eb7fe261ccda4ea2 /chiselFrontend/src/main/scala/chisel3/core/Printf.scala | |
| parent | 53813f61b7dfe246d214ab966739d01c65c8ecb0 (diff) | |
Rename "Chisel" to "chisel3" (only git mv).
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/Printf.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Printf.scala | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Printf.scala b/chiselFrontend/src/main/scala/chisel3/core/Printf.scala new file mode 100644 index 00000000..f068f637 --- /dev/null +++ b/chiselFrontend/src/main/scala/chisel3/core/Printf.scala @@ -0,0 +1,36 @@ +// See LICENSE for license details. + +package Chisel + +import scala.language.experimental.macros + +import internal._ +import internal.Builder.pushCommand +import internal.firrtl._ +import internal.sourceinfo.SourceInfo + +object printf { // scalastyle:ignore object.name + /** Prints a message in simulation. + * + * Does not fire when in reset (defined as the encapsulating Module's + * reset). If your definition of reset is not the encapsulating Module's + * reset, you will need to gate this externally. + * + * May be called outside of a Module (like defined in a function), so + * functions using printf make the standard Module assumptions (single clock + * and single reset). + * + * @param fmt printf format string + * @param data format string varargs containing data to print + */ + def apply(fmt: String, data: Bits*)(implicit sourceInfo: SourceInfo) { + when (!(Builder.dynamicContext.currentModule.get.reset)) { + printfWithoutReset(fmt, data:_*) + } + } + + private[Chisel] def printfWithoutReset(fmt: String, data: Bits*)(implicit sourceInfo: SourceInfo) { + val clock = Builder.dynamicContext.currentModule.get.clock + pushCommand(Printf(sourceInfo, Node(clock), fmt, data.map((d: Bits) => d.ref))) + } +} |
