diff options
| author | Jim Lawson | 2016-08-29 12:17:48 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-08-29 12:17:48 -0700 |
| commit | 6df3a785f8abe706838bc5b4b35c3374b6512f96 (patch) | |
| tree | a6b4961f966b69577ff4de28f2aa770b9355b7d9 /chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala | |
| parent | 5fcdd12fe92bd22f9cdfb8f5e39e510684b709bf (diff) | |
Pass compileOptions as an implicit Module parameter.
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala index f2d9558d..a9f89cbc 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala @@ -5,6 +5,7 @@ package chisel3.core import chisel3.internal.Builder.pushCommand import chisel3.internal.firrtl.{ModuleIO, DefInvalid} import chisel3.internal.sourceinfo.SourceInfo +import chisel3.NotStrict.NotStrictCompileOptions /** Defines a black box, which is a module that can be referenced from within * Chisel, but is not defined in the emitted Verilog. Useful for connecting |