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authorJack Koenig2020-03-22 18:13:58 -0700
committerJack Koenig2020-03-25 19:17:15 -0700
commitfbf5e6f1a0e8bf535d465b748ad554575fe62156 (patch)
tree578858ab6d219ca6daf44cf87b73f75054989097 /chiselFrontend/src/main/scala/chisel3/SIntFactory.scala
parentb2e004fb615a3c931d910a338b9faa99c1c975d7 (diff)
Rename subprojects to more canonical names
* Rename coreMacros to macros * Rename chiselFrontend to core Also make each subproject publish with "chisel3-" as a prefix
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/SIntFactory.scala')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/SIntFactory.scala25
1 files changed, 0 insertions, 25 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala b/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala
deleted file mode 100644
index c1c6b1db..00000000
--- a/chiselFrontend/src/main/scala/chisel3/SIntFactory.scala
+++ /dev/null
@@ -1,25 +0,0 @@
-// See LICENSE for license details.
-
-package chisel3
-
-import chisel3.internal.firrtl.{IntervalRange, SLit, Width}
-
-trait SIntFactory {
- /** Create an SInt type with inferred width. */
- def apply(): SInt = apply(Width())
- /** Create a SInt type or port with fixed width. */
- def apply(width: Width): SInt = new SInt(width)
-
- /** Create a SInt with the specified range */
- def apply(range: IntervalRange): SInt = {
- apply(range.getWidth)
- }
-
- /** Create an SInt literal with specified width. */
- // scalastyle:off method.name
- protected[chisel3] def Lit(value: BigInt, width: Width): SInt = {
- val lit = SLit(value, width)
- val result = new SInt(lit.width)
- lit.bindLitArg(result)
- }
-}