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authorSchuyler Eldridge2019-08-01 16:26:08 -0400
committerGitHub2019-08-01 16:26:08 -0400
commitb2a1bd7a10977d3331fee3022ec490a1aa1e0e17 (patch)
tree059f29769a09d423b1f4e274ecce56ce570c0467 /chiselFrontend/src/main/scala/chisel3/Reg.scala
parentad396ea1a9c06abbe29c52802adbc6c087db0401 (diff)
parent6c65a28756b8bb615479b1bcc420b28994419700 (diff)
Merge pull request #1139 from freechipsproject/deprecations-are-serious-business
Remove Deprecations since before 3.2
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/Reg.scala')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/Reg.scala26
1 files changed, 0 insertions, 26 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/Reg.scala b/chiselFrontend/src/main/scala/chisel3/Reg.scala
index 2f26f516..8d3a915d 100644
--- a/chiselFrontend/src/main/scala/chisel3/Reg.scala
+++ b/chiselFrontend/src/main/scala/chisel3/Reg.scala
@@ -46,32 +46,6 @@ object Reg {
reg
}
- @chiselRuntimeDeprecated
- @deprecated("Use Reg(t), RegNext(next, [init]) or RegInit([t], init) instead", "chisel3")
- def apply[T <: Data](t: T = null, next: T = null, init: T = null)
- (implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = {
- if (t ne null) {
- val reg = if (init ne null) {
- RegInit(t, init)
- } else {
- Reg(t)
- }
- if (next ne null) {
- reg := next
- }
- reg
- } else if (next ne null) {
- if (init ne null) {
- RegNext(next, init)
- } else {
- RegNext(next)
- }
- } else if (init ne null) {
- RegInit(init)
- } else {
- throwException("cannot infer type")
- }
- }
}
object RegNext {