summaryrefslogtreecommitdiff
path: root/chiselFrontend/src/main/scala/Chisel
diff options
context:
space:
mode:
authorAndrew Waterman2016-05-26 01:01:55 -0700
committerAndrew Waterman2016-05-26 01:01:55 -0700
commit3b10267257de7662abbbc235d9bfd8a8b89f69f5 (patch)
treee9db587a15f049231eecd525352e281de7e9bb03 /chiselFrontend/src/main/scala/Chisel
parentd742d70a05b5fa997517ea7b5eb2d15b23e7a431 (diff)
Fix type constraint on PriorityMux
Diffstat (limited to 'chiselFrontend/src/main/scala/Chisel')
-rw-r--r--chiselFrontend/src/main/scala/Chisel/SeqUtils.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/chiselFrontend/src/main/scala/Chisel/SeqUtils.scala b/chiselFrontend/src/main/scala/Chisel/SeqUtils.scala
index e3e58cb4..9a15fd5f 100644
--- a/chiselFrontend/src/main/scala/Chisel/SeqUtils.scala
+++ b/chiselFrontend/src/main/scala/Chisel/SeqUtils.scala
@@ -34,9 +34,9 @@ private[Chisel] object SeqUtils {
}
/** Returns data value corresponding to first true predicate */
- def priorityMux[T <: Bits](in: Seq[(Bool, T)]): T = macro SourceInfoTransform.inArg
+ def priorityMux[T <: Data](in: Seq[(Bool, T)]): T = macro SourceInfoTransform.inArg
- def do_priorityMux[T <: Bits](in: Seq[(Bool, T)])(implicit sourceInfo: SourceInfo): T = {
+ def do_priorityMux[T <: Data](in: Seq[(Bool, T)])(implicit sourceInfo: SourceInfo): T = {
if (in.size == 1) {
in.head._2
} else {